Mesa (master): i965/fs: Use the builder dispatch_width for computing register offsets

[Jason Ekstrand]

Module: Mesa
Branch: master
Commit: 9a0c883292cf48910a32634f7cc8b855e08c09d5
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=9a0c883292cf48910a32634f7cc8b855e08c09d5

Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date:   Thu Jun 25 11:00:01 2015 -0700

i965/fs: Use the builder dispatch_width for computing register offsets

Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
Reviewed-by: Francisco Jerez <currojerez at riseup.net>

---

 src/mesa/drivers/dri/i965/brw_fs.h |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/mesa/drivers/dri/i965/brw_fs.h b/src/mesa/drivers/dri/i965/brw_fs.h
index ece7e49..88a50ae 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.h
+++ b/src/mesa/drivers/dri/i965/brw_fs.h
@@ -72,7 +72,7 @@ offset(fs_reg reg, const brw::fs_builder& bld, unsigned delta)
    case MRF:
    case ATTR:
       return byte_offset(reg,
-                         delta * MAX2(reg.width * reg.stride, 1) *
+                         delta * MAX2(bld.dispatch_width() * reg.stride, 1) *
                          type_sz(reg.type));
    case UNIFORM:
       reg.reg_offset += delta;