Mesa (master): nv50/ir: only enable mul saturate on G200+
Ilia Mirkin
imirkin at kemper.freedesktop.org
Sat May 9 17:43:34 UTC 2015
Module: Mesa
Branch: master
Commit: da136dc07ddb6147d181c96f475b94f6281efd73
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=da136dc07ddb6147d181c96f475b94f6281efd73
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Sat May 9 03:26:07 2015 -0400
nv50/ir: only enable mul saturate on G200+
Commit 44673512a84 enabled support for saturating fmul. However
experimentally this does not seem to work on the older chips. Restrict
the feature to G200 (NVA0) and later.
Reported-by: Pierre Moreau <pierre.morrow at free.fr>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90350
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Tested-by: Pierre Moreau <pierre.morrow at free.fr>
Reviewed-by: Tobias Klausmann <tobias.johannes.klausmann at mni.thm.de>
Cc: mesa-stable at lists.freedesktop.org
---
src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp
index 178a167..a742162 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp
@@ -84,7 +84,7 @@ static const struct opProperties _initProps[] =
// neg abs not sat c[] s[], a[], imm
{ OP_ADD, 0x3, 0x0, 0x0, 0x8, 0x2, 0x1, 0x1, 0x2 },
{ OP_SUB, 0x3, 0x0, 0x0, 0x8, 0x2, 0x1, 0x1, 0x2 },
- { OP_MUL, 0x3, 0x0, 0x0, 0x8, 0x2, 0x1, 0x1, 0x2 },
+ { OP_MUL, 0x3, 0x0, 0x0, 0x0, 0x2, 0x1, 0x1, 0x2 },
{ OP_MAX, 0x3, 0x3, 0x0, 0x0, 0x2, 0x1, 0x1, 0x0 },
{ OP_MIN, 0x3, 0x3, 0x0, 0x0, 0x2, 0x1, 0x1, 0x0 },
{ OP_MAD, 0x7, 0x0, 0x0, 0x8, 0x6, 0x1, 0x1, 0x0 }, // special constraint
@@ -188,6 +188,9 @@ void TargetNV50::initOpInfo()
if (prop->mSat & 8)
opInfo[prop->op].dstMods = NV50_IR_MOD_SAT;
}
+
+ if (chipset >= 0xa0)
+ opInfo[OP_MUL].dstMods = NV50_IR_MOD_SAT;
}
unsigned int
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