Mesa (master): i965: Add renderbuffer surface indexes to debug

[Ben Widawsky]

Module: Mesa
Branch: master
Commit: fa284d6f2f9a929497714c795d09e56547bccf44
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=fa284d6f2f9a929497714c795d09e56547bccf44

Author: Ben Widawsky <benjamin.widawsky at intel.com>
Date:   Fri May 15 21:18:12 2015 -0700

i965: Add renderbuffer surface indexes to debug

This patch is optional in the series. It does make the output much cleaner, but
there is some risk.

Sample output (v3):
0x00007e80:      0x231d7000:  SURF000: 2D R8G8B8A8_UNORM  VALIGN4 HALIGN4 Y-tiled
0x00007e84:      0x05000000:  SURF000: MOCS: 0x5 Base MIP: 0.0 (0 mips) Surface QPitch: 0
0x00007e88:      0x009f009f:  SURF000: 160x160 [AUX_NONE]
0x00007e8c:      0x0000027f:  SURF000: 1 slices (depth), pitch: 640
0x00007e90:      0x00000000:  SURF000: min array element: 0, array extent 1, MULTISAMPLE_1
0x00007e94:      0x00000000:  SURF000: x,y offset: 0,0, min LOD: 0
0x00007e98:      0x00000000:  SURF000: AUX pitch: 0 qpitch: 0
0x00007e9c:      0x09770000:  SURF000: Clear color: R(0)G(0)B(0)A(0)
0x00007ea0:      0x00001000:  SURF000: 0x00001000
0x00007ea4:      0x00000000:  SURF000: 0x00000000
0x00007ea8:      0x00000000:  SURF000: 0x00000000
0x00007eac:      0x00000000:  SURF000: 0x00000000
0x00007e40:      0x234df000:  SURF001: 2D R11G11B10_FLOAT  VALIGN4 HALIGN16 Y-tiled
0x00007e44:      0x09000000:  SURF001: MOCS: 0x9 Base MIP: 0.0 (0 mips) Surface QPitch: 0
0x00007e48:      0x009f009f:  SURF001: 160x160 [AUX_CCS_D (Uncompressed, MULTISAMPLE_COUNT=1)]
0x00007e4c:      0x0000027f:  SURF001: 1 slices (depth), pitch: 640
0x00007e50:      0x00000000:  SURF001: min array element: 0, array extent 1, MULTISAMPLE_1
0x00007e54:      0x00000000:  SURF001: x,y offset: 0,0, min LOD: 0
0x00007e58:      0x00000001:  SURF001: AUX pitch: 0 qpitch: 0
0x00007e5c:      0x09770000:  SURF001: Clear color: R(0)G(0)B(0)A(0)
0x00007e60:      0x0002b000:  SURF001: 0x0002b000
0x00007e64:      0x00000000:  SURF001: 0x00000000
0x00007e68:      0x0002a000:  SURF001: 0x0002a000
0x00007e6c:      0x00000000:  SURF001: 0x00000000

v2: Rebased on Topi's recent series which changed around some of the gen8
surface setup code.

v3: Use ralloc_asprintf instead of asprintf to be more friendly to non-GNU
platforms.

Signed-off-by: Ben Widawsky <ben at bwidawsk.net>

---

 src/mesa/drivers/dri/i965/brw_state_dump.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/mesa/drivers/dri/i965/brw_state_dump.c b/src/mesa/drivers/dri/i965/brw_state_dump.c
index bce13d6..f9e087e 100644
--- a/src/mesa/drivers/dri/i965/brw_state_dump.c
+++ b/src/mesa/drivers/dri/i965/brw_state_dump.c
@@ -278,7 +278,7 @@ dump_gen8_surface_state(struct brw_context *brw, uint32_t offset, int index)
 
    name = ralloc_asprintf(NULL, "SURF%03d", index);
    batch_out(brw, name, offset, 0, "%s %s %s VALIGN%d HALIGN%d %s\n",
-             brw_surface_format_name(GET_FIELD(surf[0], BRW_SURFACE_TYPE)),
+             get_965_surfacetype(GET_FIELD(surf[0], BRW_SURFACE_TYPE)),
              brw_surface_format_name(GET_FIELD(surf[0], BRW_SURFACE_FORMAT)),
              (surf[0] & GEN7_SURFACE_IS_ARRAY) ? "array" : "",
              1 << (GET_BITS(surf[0], 17, 16) + 1), /* VALIGN */