Mesa (master): i965: Emit 3DSTATE_MULTISAMPLE before WM_HZ_OP (gen8+)

[Ben Widawsky]

Module: Mesa
Branch: master
Commit: e2d84d99f5a66738e8f584bdfea66182f36fe46c
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=e2d84d99f5a66738e8f584bdfea66182f36fe46c

Author: Ben Widawsky <benjamin.widawsky at intel.com>
Date:   Wed May 20 19:20:14 2015 -0700

i965: Emit 3DSTATE_MULTISAMPLE before WM_HZ_OP (gen8+)

Starting with GEN8, there is documentation that the multisample state command
must be emitted before the 3DSTATE_WM_HZ_OP command any time the multisample
count changes. The 3DSTATE_WM_HZ_OP packet gets emitted as a result of a
intel_hix_exec(), which is called upon a fast clear and/or a resolve. This can
happen before the state atoms are checked, and so the multisample state must be
put directly in the function.

v1:
- In v0, I was always emitting the command, but Ken came up with the condition to
determine whether or not the sample count actually changed.
- Ken's recommendation was to set brw->num_multisamples after emitting
3DSTATE_MULTISAMPLE. This doesn't work. I put my best guess as to why in the XXX
(it was causing 7 regressions on BDW).

v2:
Flag NEW_MULTISAMPLE state. As Ken found, in state upload we check for the
multisample change to determine whether or not to emit certain packets. Since
the hiz code doesn't actually care about the number of multisamples, set the
flag and let the later code take care of it.

Jenkins results:
http://otc-mesa-ci.jf.intel.com/view/dev/job/bwidawsk/136/

Fixes around 200 piglit tests on SKL. I'm somewhat surprised that it seems to
have no impact on BDW as the restriction is needed there as well.

Cc: "10.5 10.6" <mesa-stable at lists.freedesktop.org>
Signed-off-by: Ben Widawsky <ben at bwidawsk.net>
Reviewed-by: Neil Roberts <neil at linux.intel.com> (v0)
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org> (v2)

---

 src/mesa/drivers/dri/i965/gen8_depth_state.c |   10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/src/mesa/drivers/dri/i965/gen8_depth_state.c b/src/mesa/drivers/dri/i965/gen8_depth_state.c
index b502650..12ac97a 100644
--- a/src/mesa/drivers/dri/i965/gen8_depth_state.c
+++ b/src/mesa/drivers/dri/i965/gen8_depth_state.c
@@ -417,6 +417,16 @@ gen8_hiz_exec(struct brw_context *brw, struct intel_mipmap_tree *mt,
    uint32_t surface_width  = ALIGN(mt->logical_width0,  level == 0 ? 8 : 1);
    uint32_t surface_height = ALIGN(mt->logical_height0, level == 0 ? 4 : 1);
 
+   /* From the documentation for 3DSTATE_WM_HZ_OP: "3DSTATE_MULTISAMPLE packet
+    * must be used prior to this packet to change the Number of Multisamples.
+    * This packet must not be used to change Number of Multisamples in a
+    * rendering sequence."
+    */
+   if (brw->num_samples != mt->num_samples) {
+      gen8_emit_3dstate_multisample(brw, mt->num_samples);
+      brw->NewGLState |= _NEW_MULTISAMPLE;
+   }
+
    /* The basic algorithm is:
     * - If needed, emit 3DSTATE_{DEPTH,HIER_DEPTH,STENCIL}_BUFFER and
     *   3DSTATE_CLEAR_PARAMS packets to set up the relevant buffers.