Mesa (master): i965/gen8+: Extract color clear surface state

Ben Widawsky bwidawsk at kemper.freedesktop.org
Tue Nov 3 21:54:35 UTC 2015


Module: Mesa
Branch: master
Commit: 5d4b019d2a6d4deb4db11780618515cf1fa8a4fc
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=5d4b019d2a6d4deb4db11780618515cf1fa8a4fc

Author: Ben Widawsky <benjamin.widawsky at intel.com>
Date:   Tue Oct 13 20:50:19 2015 -0700

i965/gen8+: Extract color clear surface state

On future generation platforms the color clear value is stored elsewhere in the
surface state. By extracting this logic, we can cleanly implement the difference
in an upcoming patch.

Should have no functional impact.

v2: Move hunk from the next patch into this patch (Matt)
Whitespace fix (Ben)

Signed-off-by: Ben Widawsky <ben at bwidawsk.net>
Reviewed-by: Neil Roberts <neil at linux.intel.com>

---

 src/mesa/drivers/dri/i965/gen8_surface_state.c |   21 +++++++++++++++------
 1 file changed, 15 insertions(+), 6 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/gen8_surface_state.c b/src/mesa/drivers/dri/i965/gen8_surface_state.c
index eaaecd3..140a654 100644
--- a/src/mesa/drivers/dri/i965/gen8_surface_state.c
+++ b/src/mesa/drivers/dri/i965/gen8_surface_state.c
@@ -183,6 +183,14 @@ gen8_emit_buffer_surface_state(struct brw_context *brw,
 }
 
 static void
+gen8_emit_fast_clear_color(struct brw_context *brw,
+                           struct intel_mipmap_tree *mt,
+                           uint32_t *surf)
+{
+   surf[7] |= mt->fast_clear_color_value;
+}
+
+static void
 gen8_emit_texture_surface_state(struct brw_context *brw,
                                 struct intel_mipmap_tree *mt,
                                 GLenum target,
@@ -286,7 +294,8 @@ gen8_emit_texture_surface_state(struct brw_context *brw,
                 aux_mode;
    }
 
-   surf[7] = mt->fast_clear_color_value |
+   gen8_emit_fast_clear_color(brw, mt, surf);
+   surf[7] |=
       SET_FIELD(swizzle_to_scs(GET_SWZ(swizzle, 0)), GEN7_SURFACE_SCS_R) |
       SET_FIELD(swizzle_to_scs(GET_SWZ(swizzle, 1)), GEN7_SURFACE_SCS_G) |
       SET_FIELD(swizzle_to_scs(GET_SWZ(swizzle, 2)), GEN7_SURFACE_SCS_B) |
@@ -510,11 +519,11 @@ gen8_update_renderbuffer_surface(struct brw_context *brw,
                 aux_mode;
    }
 
-   surf[7] = mt->fast_clear_color_value |
-             SET_FIELD(HSW_SCS_RED,   GEN7_SURFACE_SCS_R) |
-             SET_FIELD(HSW_SCS_GREEN, GEN7_SURFACE_SCS_G) |
-             SET_FIELD(HSW_SCS_BLUE,  GEN7_SURFACE_SCS_B) |
-             SET_FIELD(HSW_SCS_ALPHA, GEN7_SURFACE_SCS_A);
+   gen8_emit_fast_clear_color(brw, mt, surf);
+   surf[7] |= SET_FIELD(HSW_SCS_RED,   GEN7_SURFACE_SCS_R) |
+              SET_FIELD(HSW_SCS_GREEN, GEN7_SURFACE_SCS_G) |
+              SET_FIELD(HSW_SCS_BLUE,  GEN7_SURFACE_SCS_B) |
+              SET_FIELD(HSW_SCS_ALPHA, GEN7_SURFACE_SCS_A);
 
    assert(mt->offset % mt->cpp == 0);
    *((uint64_t *) &surf[8]) = mt->bo->offset64 + mt->offset; /* reloc */




More information about the mesa-commit mailing list