[Mesa-dev] [PATCH 12/13] i915g: implement unfenced color&depth buffer using tiling bits

[Daniel Vetter]

Also change the vbo reloc to unfenced - tiled vbos are not a great idea ;-)

Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
---
 src/gallium/drivers/i915/i915_context.h    |    3 +--
 src/gallium/drivers/i915/i915_reg.h        |    2 ++
 src/gallium/drivers/i915/i915_state_emit.c |   12 +++++-------
 3 files changed, 8 insertions(+), 9 deletions(-)

diff --git a/src/gallium/drivers/i915/i915_context.h b/src/gallium/drivers/i915/i915_context.h
index 3ae61d0..7103a1b 100644
--- a/src/gallium/drivers/i915/i915_context.h
+++ b/src/gallium/drivers/i915/i915_context.h
@@ -193,8 +193,7 @@ struct i915_velems_state {
 };
 
 
-struct i915_context
-{
+struct i915_context {
    struct pipe_context base;
 
    struct i915_winsys *iws;
diff --git a/src/gallium/drivers/i915/i915_reg.h b/src/gallium/drivers/i915/i915_reg.h
index cc28891..24b3ac9 100644
--- a/src/gallium/drivers/i915/i915_reg.h
+++ b/src/gallium/drivers/i915/i915_reg.h
@@ -102,6 +102,8 @@
 #define BUF_3D_TILED_SURFACE	(1<<22)
 #define BUF_3D_TILE_WALK_X	0
 #define BUF_3D_TILE_WALK_Y	(1<<21)
+#define BUF_3D_TILE_BITS(tiling) (((tiling) ? BUF_3D_TILED_SURFACE : 0) \
+				| ((tiling) == I915_TILE_Y ?  BUF_3D_TILE_WALK_Y : 0))
 #define BUF_3D_PITCH(x)         (((x)/4)<<2)
 /* Dword 2 */
 #define BUF_3D_ADDR(x)		((x) & ~0x3)
diff --git a/src/gallium/drivers/i915/i915_state_emit.c b/src/gallium/drivers/i915/i915_state_emit.c
index b344ef6..b07ccd6 100644
--- a/src/gallium/drivers/i915/i915_state_emit.c
+++ b/src/gallium/drivers/i915/i915_state_emit.c
@@ -188,7 +188,7 @@ i915_emit_hardware_state(struct i915_context *i915 )
                 (5));
       
       if(i915->vbo)
-         OUT_RELOC_FENCED(i915->vbo,
+         OUT_RELOC(i915->vbo,
                    I915_USAGE_VERTEX,
                    i915->current.immediate[I915_IMMEDIATE_S0]);
       else
@@ -220,7 +220,6 @@ i915_emit_hardware_state(struct i915_context *i915 )
       struct pipe_surface *depth_surface = i915->framebuffer.zsbuf;
 
       if (cbuf_surface) {
-         unsigned ctile = BUF_3D_USE_FENCE;
          struct i915_texture *tex = i915_texture(cbuf_surface->texture);
          assert(tex);
 
@@ -228,9 +227,9 @@ i915_emit_hardware_state(struct i915_context *i915 )
 
          OUT_BATCH(BUF_3D_ID_COLOR_BACK |
                    BUF_3D_PITCH(tex->stride) |  /* pitch in bytes */
-                   ctile);
+                   BUF_3D_TILE_BITS(tex->tiling));
 
-         OUT_RELOC_FENCED(tex->buffer,
+         OUT_RELOC(tex->buffer,
                    I915_USAGE_RENDER,
                    cbuf_surface->offset);
       }
@@ -238,7 +237,6 @@ i915_emit_hardware_state(struct i915_context *i915 )
       /* What happens if no zbuf??
        */
       if (depth_surface) {
-         unsigned ztile = BUF_3D_USE_FENCE;
          struct i915_texture *tex = i915_texture(depth_surface->texture);
          assert(tex);
 
@@ -247,9 +245,9 @@ i915_emit_hardware_state(struct i915_context *i915 )
          assert(tex);
          OUT_BATCH(BUF_3D_ID_DEPTH |
                    BUF_3D_PITCH(tex->stride) |  /* pitch in bytes */
-                   ztile);
+                   BUF_3D_TILE_BITS(tex->tiling));
 
-         OUT_RELOC_FENCED(tex->buffer,
+         OUT_RELOC(tex->buffer,
                    I915_USAGE_RENDER,
                    depth_surface->offset);
       }
-- 
1.7.1