[Mesa-dev] [PATCH 13/13] i915g: implement unfenced relocs for textures using tiling bits

[Jakob Bornecrantz]

On Fri, Nov 19, 2010 at 11:38 PM, Daniel Vetter <daniel.vetter at ffwll.ch> wrote:
> Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
> ---
>  src/gallium/drivers/i915/i915_reg.h           |    5 ++++-
>  src/gallium/drivers/i915/i915_state_sampler.c |    3 +--
>  2 files changed, 5 insertions(+), 3 deletions(-)
>
> diff --git a/src/gallium/drivers/i915/i915_reg.h b/src/gallium/drivers/i915/i915_reg.h
> index 24b3ac9..21a26b2 100644
> --- a/src/gallium/drivers/i915/i915_reg.h
> +++ b/src/gallium/drivers/i915/i915_reg.h
> @@ -29,6 +29,7 @@
>  #ifndef I915_REG_H
>  #define I915_REG_H
>
> +#include "i915_winsys.h"
>
>  #define I915_SET_FIELD( var, mask, value ) (var &= ~(mask), var |= value)
>
> @@ -755,7 +756,9 @@
>  #define    MT_COMPRESS_DXT1_RGB                   (4<<3)
>  #define MS3_USE_FENCE_REGS              (1<<2)
>  #define MS3_TILED_SURFACE             (1<<1)
> -#define MS3_TILE_WALK                 (1<<0)
> +#define MS3_TILE_WALK_Y                (1<<0)
> +#define MS3_TILE_BITS(tiling) (((tiling) ? MS3_TILED_SURFACE : 0) \
> +                            | ((tiling) == I915_TILE_Y ?  MS3_TILE_WALK_Y : 0))

Again what about X tiling?

>
>  #define MS4_PITCH_SHIFT                 21
>  #define MS4_CUBE_FACE_ENA_NEGX          (1<<20)
> diff --git a/src/gallium/drivers/i915/i915_state_sampler.c b/src/gallium/drivers/i915/i915_state_sampler.c
> index 9771274..09a6f96 100644
> --- a/src/gallium/drivers/i915/i915_state_sampler.c
> +++ b/src/gallium/drivers/i915/i915_state_sampler.c
> @@ -254,7 +254,6 @@ static void update_map(struct i915_context *i915,
>    const uint width = pt->width0, height = pt->height0, depth = pt->depth0;
>    const uint num_levels = pt->last_level;
>    unsigned max_lod = num_levels * 4;
> -   unsigned tiled = MS3_USE_FENCE_REGS;
>
>    assert(tex);
>    assert(width);
> @@ -272,7 +271,7 @@ static void update_map(struct i915_context *i915,
>       (((height - 1) << MS3_HEIGHT_SHIFT)
>        | ((width - 1) << MS3_WIDTH_SHIFT)
>        | format
> -       | tiled);
> +       | MS3_TILE_BITS(tex->tiling));
>
>    /*
>     * XXX When min_filter != mag_filter and there's just one mipmap level,
> --
> 1.7.1

I'm missing a chunk in i915_state_emit that changes the
OUT_RELOC_FENCED to just OUT_RELOC.

Cheers Jakob.