[Mesa-dev] [PATCH 0/6] patches to increase the brw eu instruction store size dynamically

[Yuanhan Liu]

Actually the first 5 patches are all prepare work for patch 6.

I checked those patches will all intel oglc testcases, and found no regressions.
What's better, it fixed something.


Yuanhan Liu (6):
  i965: let all the brw_OPCODE functions return an instruction index
    instead
  i965: remove the second unused parameter of gen6_CONT
  i965: let all the while loop stack to store an instruction index
    instead
  i965: let if_stack just store the instruction index
  i965: let brw_lan_fwd_jump() get the jmp_insn by the instruction
    index
  i965: increase the brw eu instruction store size dynamically

 src/mesa/drivers/dri/i965/brw_clip_line.c     |    2 +-
 src/mesa/drivers/dri/i965/brw_clip_tri.c      |    6 +-
 src/mesa/drivers/dri/i965/brw_clip_unfilled.c |    4 +-
 src/mesa/drivers/dri/i965/brw_eu.c            |   10 +-
 src/mesa/drivers/dri/i965/brw_eu.h            |   46 +++---
 src/mesa/drivers/dri/i965/brw_eu_emit.c       |  235 +++++++++++++------------
 src/mesa/drivers/dri/i965/brw_fs_emit.cpp     |   15 +-
 src/mesa/drivers/dri/i965/brw_sf_emit.c       |    2 +-
 src/mesa/drivers/dri/i965/brw_vec4_emit.cpp   |   23 ++--
 src/mesa/drivers/dri/i965/brw_vs_emit.c       |   15 +-
 src/mesa/drivers/dri/i965/brw_wm.h            |   14 +-
 src/mesa/drivers/dri/i965/brw_wm_emit.c       |   16 +-
 12 files changed, 202 insertions(+), 186 deletions(-)

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1.7.4.4