[Mesa-dev] [PATCH 8/8] i965: increase the brw eu instruction store size dynamically

[Kenneth Graunke]

On 12/21/2011 01:33 AM, Yuanhan Liu wrote:
> Here is the final patch to enable dynamic eu instruction store size:
> increase the brw eu instruction store size dynamically instead of just
> allocating it statically with a constant limit. This would fix something
> that 'GL_MAX_PROGRAM_INSTRUCTIONS_ARB was 16384 while the driver would
> limit it to 10000'.
> 
> Signed-off-by: Yuanhan Liu <yuanhan.liu at linux.intel.com>
> ---
>  src/mesa/drivers/dri/i965/brw_eu.c      |    7 +++++++
>  src/mesa/drivers/dri/i965/brw_eu.h      |    7 ++++---
>  src/mesa/drivers/dri/i965/brw_eu_emit.c |   12 +++++++++++-
>  3 files changed, 22 insertions(+), 4 deletions(-)
> 
> diff --git a/src/mesa/drivers/dri/i965/brw_eu.c b/src/mesa/drivers/dri/i965/brw_eu.c
> index 9b4dde8..7d206f3 100644
> --- a/src/mesa/drivers/dri/i965/brw_eu.c
> +++ b/src/mesa/drivers/dri/i965/brw_eu.c
> @@ -174,6 +174,13 @@ void
>  brw_init_compile(struct brw_context *brw, struct brw_compile *p, void *mem_ctx)
>  {
>     p->brw = brw;
> +   /*
> +    * Set the initial instruction store array size to 1024, if found that
> +    * isn't enough, then it will double the store size at brw_next_insn()
> +    * until it meet the BRW_EU_MAX_INSN
> +    */
> +   p->store_size = 1024;
> +   p->store = rzalloc_array(mem_ctx, struct brw_instruction, p->store_size);
>     p->nr_insn = 0;
>     p->current = p->stack;
>     p->compressed = false;
> diff --git a/src/mesa/drivers/dri/i965/brw_eu.h b/src/mesa/drivers/dri/i965/brw_eu.h
> index 9d3d7de..52567c2 100644
> --- a/src/mesa/drivers/dri/i965/brw_eu.h
> +++ b/src/mesa/drivers/dri/i965/brw_eu.h
> @@ -100,11 +100,12 @@ struct brw_glsl_call;
>  
>  
>  
> -#define BRW_EU_MAX_INSN_STACK 5
> -#define BRW_EU_MAX_INSN 10000
> +#define BRW_EU_MAX_INSN_STACK   5
> +#define BRW_EU_MAX_INSN         (1024 * 1024)

I'm actually surprised to see BRW_EU_MAX_INSN at all.  As far as I know,
there isn't an actual hardware limit on the number of instructions, so
I'm not sure why we should cap it at all.  Especially not to some
arbitrary number.  (I'm assuming that 1024 * 1024 is just something you
came up with arbitrarily...)

>  struct brw_compile {
> -   struct brw_instruction store[BRW_EU_MAX_INSN];
> +   struct brw_instruction *store;
> +   int store_size;
>     GLuint nr_insn;
>  
>     void *mem_ctx;
> diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c
> index bd5fe6a..4396a0c 100644
> --- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
> +++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c
> @@ -691,7 +691,17 @@ brw_next_insn(struct brw_compile *p, GLuint opcode)
>  {
>     struct brw_instruction *insn;
>  
> -   assert(p->nr_insn + 1 < BRW_EU_MAX_INSN);
> +   if (p->nr_insn + 1 > p->store_size) {
> +      if (p->nr_insn + 1 > BRW_EU_MAX_INSN) {
> +         assert(!"exceed max brw allowed eu instructions");
> +      } else {
> +         if (0)
> +            printf("incresing the store size to %d\n", p->store_size << 1);
> +         p->store_size <<= 1;
> +         p->store = reralloc(p->mem_ctx, p->store,
> +                             struct brw_instruction, p->store_size);
> +      }
> +   }
>  
>     insn = &p->store[p->nr_insn++];
>     memcpy(insn, p->current, sizeof(*insn));