[Mesa-dev] [PATCH] r600g: Check for reduction instructions when merging instruction groups

Tom Stellard thomas.stellard at amd.com
Wed Oct 5 11:48:06 PDT 2011


On Wed, 2011-10-05 at 13:25 -0400, Christian König wrote:
> Am Mittwoch, den 05.10.2011, 10:57 -0400 schrieb Tom Stellard:
> > Reduction instructions can't share an instruction group with other
> > instructions, so we need to check for them when trying to merge
> > instruction groups. 
> 
> Hui? Where do you got that info?

pg. 60 r600isa.pdf

> I especially created that code to let a DOT4 and an ADD instruction
> share the same instruction group in the first place, so I'm pretty sure
> that it work.
> 

If I understand the docs correctly, this is possible if the ADD
instruction is in the ALU.Trans slot.  I overlooked this in the initial
patch.  I'll try to revise it to account for this.

> It is indeed not possible to have a reduction instruction + something
> else in the vector slots, but since a reduction instruction should
> always take all four vector slots that shouldn't be a problem.
> 
> So what is the reason/problem behind it?
> 

Good point.  I was thinking that one reduction slot plus three empty
slots was acceptable, but maybe all slots do have to be exactly the
same.  I'll try to play around with this some more and find out exactly
how it works.

-Tom





More information about the mesa-dev mailing list