[Mesa-dev] [PATCH 2/4] i965: Rename (vs|wm)_max_threads to max_(vs|wm)_threads for consistency.
Kenneth Graunke
kenneth at whitecape.org
Mon Oct 24 15:01:31 PDT 2011
The inconsistency between vs_max_threads and max_vs_entries was rather
annoying. I could never seem to remember which one was reversed, which
made it harder to find quickly. "Max __ Threads" seems more natural.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
---
src/mesa/drivers/dri/i965/brw_context.c | 28 ++++++++++++++--------------
src/mesa/drivers/dri/i965/brw_context.h | 9 +++++++--
src/mesa/drivers/dri/i965/brw_vs.c | 2 +-
src/mesa/drivers/dri/i965/brw_vs_state.c | 2 +-
src/mesa/drivers/dri/i965/brw_wm.c | 2 +-
src/mesa/drivers/dri/i965/brw_wm_state.c | 2 +-
src/mesa/drivers/dri/i965/gen6_vs_state.c | 2 +-
src/mesa/drivers/dri/i965/gen6_wm_state.c | 2 +-
src/mesa/drivers/dri/i965/gen7_vs_state.c | 2 +-
src/mesa/drivers/dri/i965/gen7_wm_state.c | 2 +-
10 files changed, 29 insertions(+), 24 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c
index dcc2552..661b14f 100644
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -190,14 +190,14 @@ brwCreateContext(int api,
/* WM maximum threads is number of EUs times number of threads per EU. */
if (intel->gen >= 7) {
if (intel->gt == 1) {
- brw->wm_max_threads = 86;
- brw->vs_max_threads = 36;
+ brw->max_wm_threads = 86;
+ brw->max_vs_threads = 36;
brw->urb.size = 128;
brw->urb.max_vs_entries = 512;
brw->urb.max_gs_entries = 192;
} else if (intel->gt == 2) {
- brw->wm_max_threads = 86;
- brw->vs_max_threads = 128;
+ brw->max_wm_threads = 86;
+ brw->max_vs_threads = 128;
brw->urb.size = 256;
brw->urb.max_vs_entries = 704;
brw->urb.max_gs_entries = 320;
@@ -210,28 +210,28 @@ brwCreateContext(int api,
* disabling of WIZ hashing (bit 6 of GT_MODE, 0x20d0) and a
* GPU reset to change.
*/
- brw->wm_max_threads = 40;
- brw->vs_max_threads = 60;
+ brw->max_wm_threads = 40;
+ brw->max_vs_threads = 60;
brw->urb.size = 64; /* volume 5c.5 section 5.1 */
brw->urb.max_vs_entries = 256; /* volume 2a (see 3DSTATE_URB) */
} else {
- brw->wm_max_threads = 40;
- brw->vs_max_threads = 24;
+ brw->max_wm_threads = 40;
+ brw->max_vs_threads = 24;
brw->urb.size = 32; /* volume 5c.5 section 5.1 */
brw->urb.max_vs_entries = 128; /* volume 2a (see 3DSTATE_URB) */
}
} else if (intel->gen == 5) {
brw->urb.size = 1024;
- brw->vs_max_threads = 72;
- brw->wm_max_threads = 12 * 6;
+ brw->max_vs_threads = 72;
+ brw->max_wm_threads = 12 * 6;
} else if (intel->is_g4x) {
brw->urb.size = 384;
- brw->vs_max_threads = 32;
- brw->wm_max_threads = 10 * 5;
+ brw->max_vs_threads = 32;
+ brw->max_wm_threads = 10 * 5;
} else if (intel->gen < 6) {
brw->urb.size = 256;
- brw->vs_max_threads = 16;
- brw->wm_max_threads = 8 * 4;
+ brw->max_vs_threads = 16;
+ brw->max_wm_threads = 8 * 4;
brw->has_negative_rhw_bug = true;
}
diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h
index 7e2675a..f19bf31 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -666,8 +666,13 @@ struct brw_context
uint32_t CMD_VF_STATISTICS;
/* hw-dependent 3DSTATE_PIPELINE_SELECT opcode */
uint32_t CMD_PIPELINE_SELECT;
- int vs_max_threads;
- int wm_max_threads;
+
+ /**
+ * Platform specific constants containing the maximum number of threads
+ * for each pipeline stage.
+ */
+ int max_vs_threads;
+ int max_wm_threads;
/* BRW_NEW_URB_ALLOCATIONS:
*/
diff --git a/src/mesa/drivers/dri/i965/brw_vs.c b/src/mesa/drivers/dri/i965/brw_vs.c
index 7b002e8..8813498 100644
--- a/src/mesa/drivers/dri/i965/brw_vs.c
+++ b/src/mesa/drivers/dri/i965/brw_vs.c
@@ -242,7 +242,7 @@ do_vs_prog(struct brw_context *brw,
c.prog_data.total_scratch = brw_get_scratch_size(c.last_scratch);
brw_get_scratch_bo(intel, &brw->vs.scratch_bo,
- c.prog_data.total_scratch * brw->vs_max_threads);
+ c.prog_data.total_scratch * brw->max_vs_threads);
}
/* get the program
diff --git a/src/mesa/drivers/dri/i965/brw_vs_state.c b/src/mesa/drivers/dri/i965/brw_vs_state.c
index 8d86c12..f018fc6 100644
--- a/src/mesa/drivers/dri/i965/brw_vs_state.c
+++ b/src/mesa/drivers/dri/i965/brw_vs_state.c
@@ -142,7 +142,7 @@ brw_prepare_vs_unit(struct brw_context *brw)
vs->thread4.urb_entry_allocation_size = brw->urb.vsize - 1;
vs->thread4.max_threads = CLAMP(brw->urb.nr_vs_entries / 2,
- 1, brw->vs_max_threads) - 1;
+ 1, brw->max_vs_threads) - 1;
/* No samplers for ARB_vp programs:
*/
diff --git a/src/mesa/drivers/dri/i965/brw_wm.c b/src/mesa/drivers/dri/i965/brw_wm.c
index 1880a1c..b60173e 100644
--- a/src/mesa/drivers/dri/i965/brw_wm.c
+++ b/src/mesa/drivers/dri/i965/brw_wm.c
@@ -247,7 +247,7 @@ bool do_wm_prog(struct brw_context *brw,
c->prog_data.total_scratch = brw_get_scratch_size(c->last_scratch);
brw_get_scratch_bo(intel, &brw->wm.scratch_bo,
- c->prog_data.total_scratch * brw->wm_max_threads);
+ c->prog_data.total_scratch * brw->max_wm_threads);
}
if (unlikely(INTEL_DEBUG & DEBUG_WM))
diff --git a/src/mesa/drivers/dri/i965/brw_wm_state.c b/src/mesa/drivers/dri/i965/brw_wm_state.c
index c820ce4..b66fb92 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_state.c
@@ -187,7 +187,7 @@ brw_prepare_wm_unit(struct brw_context *brw)
if (!wm->wm5.enable_8_pix)
wm->wm5.enable_16_pix = 1;
- wm->wm5.max_threads = brw->wm_max_threads - 1;
+ wm->wm5.max_threads = brw->max_wm_threads - 1;
/* _NEW_BUFFERS | _NEW_COLOR */
if (brw_color_buffer_write_enabled(brw) ||
diff --git a/src/mesa/drivers/dri/i965/gen6_vs_state.c b/src/mesa/drivers/dri/i965/gen6_vs_state.c
index f2c2e2b..202c109 100644
--- a/src/mesa/drivers/dri/i965/gen6_vs_state.c
+++ b/src/mesa/drivers/dri/i965/gen6_vs_state.c
@@ -176,7 +176,7 @@ upload_vs_state(struct brw_context *brw)
(brw->vs.prog_data->urb_read_length << GEN6_VS_URB_READ_LENGTH_SHIFT) |
(0 << GEN6_VS_URB_ENTRY_READ_OFFSET_SHIFT));
- OUT_BATCH(((brw->vs_max_threads - 1) << GEN6_VS_MAX_THREADS_SHIFT) |
+ OUT_BATCH(((brw->max_vs_threads - 1) << GEN6_VS_MAX_THREADS_SHIFT) |
GEN6_VS_STATISTICS_ENABLE |
GEN6_VS_ENABLE);
ADVANCE_BATCH();
diff --git a/src/mesa/drivers/dri/i965/gen6_wm_state.c b/src/mesa/drivers/dri/i965/gen6_wm_state.c
index 370516d..24fc81d 100644
--- a/src/mesa/drivers/dri/i965/gen6_wm_state.c
+++ b/src/mesa/drivers/dri/i965/gen6_wm_state.c
@@ -144,7 +144,7 @@ upload_wm_state(struct brw_context *brw)
dw4 |= (brw->wm.prog_data->first_curbe_grf_16 <<
GEN6_WM_DISPATCH_START_GRF_SHIFT_2);
- dw5 |= (brw->wm_max_threads - 1) << GEN6_WM_MAX_THREADS_SHIFT;
+ dw5 |= (brw->max_wm_threads - 1) << GEN6_WM_MAX_THREADS_SHIFT;
/* CACHE_NEW_WM_PROG */
if (brw->wm.prog_data->dispatch_width == 8) {
diff --git a/src/mesa/drivers/dri/i965/gen7_vs_state.c b/src/mesa/drivers/dri/i965/gen7_vs_state.c
index f3cd5d1..4ef9c68 100644
--- a/src/mesa/drivers/dri/i965/gen7_vs_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_vs_state.c
@@ -84,7 +84,7 @@ upload_vs_state(struct brw_context *brw)
(brw->vs.prog_data->urb_read_length << GEN6_VS_URB_READ_LENGTH_SHIFT) |
(0 << GEN6_VS_URB_ENTRY_READ_OFFSET_SHIFT));
- OUT_BATCH(((brw->vs_max_threads - 1) << GEN6_VS_MAX_THREADS_SHIFT) |
+ OUT_BATCH(((brw->max_vs_threads - 1) << GEN6_VS_MAX_THREADS_SHIFT) |
GEN6_VS_STATISTICS_ENABLE |
GEN6_VS_ENABLE);
ADVANCE_BATCH();
diff --git a/src/mesa/drivers/dri/i965/gen7_wm_state.c b/src/mesa/drivers/dri/i965/gen7_wm_state.c
index 653f6a8..aae3c11 100644
--- a/src/mesa/drivers/dri/i965/gen7_wm_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_wm_state.c
@@ -150,7 +150,7 @@ upload_ps_state(struct brw_context *brw)
dw2 |= GEN7_PS_FLOATING_POINT_MODE_ALT;
/* CACHE_NEW_SAMPLER */
- dw4 |= (brw->wm_max_threads - 1) << GEN7_PS_MAX_THREADS_SHIFT;
+ dw4 |= (brw->max_wm_threads - 1) << GEN7_PS_MAX_THREADS_SHIFT;
/* CACHE_NEW_WM_PROG */
if (brw->wm.prog_data->nr_params > 0)
--
1.7.7
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