[Mesa-dev] [PATCH 13/36] i965: SF: Move the computation of urb_entry_read_offset.

Paul Berry stereotype441 at gmail.com
Fri Sep 2 09:06:52 PDT 2011


This patch moves the computation of the SF URB entry read offset from
upload_sf_unit() to its own function, so that it can be re-used when
creating the gen4-5 SF program.
---
 src/mesa/drivers/dri/i965/brw_sf.h       |    1 +
 src/mesa/drivers/dri/i965/brw_sf_state.c |   20 ++++++++++++++++----
 2 files changed, 17 insertions(+), 4 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_sf.h b/src/mesa/drivers/dri/i965/brw_sf.h
index be32085..102df33 100644
--- a/src/mesa/drivers/dri/i965/brw_sf.h
+++ b/src/mesa/drivers/dri/i965/brw_sf.h
@@ -104,5 +104,6 @@ void brw_emit_line_setup( struct brw_sf_compile *c, GLboolean allocate );
 void brw_emit_point_setup( struct brw_sf_compile *c, GLboolean allocate );
 void brw_emit_point_sprite_setup( struct brw_sf_compile *c, GLboolean allocate );
 void brw_emit_anyprim_setup( struct brw_sf_compile *c );
+int brw_sf_compute_urb_entry_read_offset(struct intel_context *intel);
 
 #endif
diff --git a/src/mesa/drivers/dri/i965/brw_sf_state.c b/src/mesa/drivers/dri/i965/brw_sf_state.c
index 9201be7..f193d94 100644
--- a/src/mesa/drivers/dri/i965/brw_sf_state.c
+++ b/src/mesa/drivers/dri/i965/brw_sf_state.c
@@ -35,6 +35,7 @@
 #include "brw_state.h"
 #include "brw_defines.h"
 #include "main/macros.h"
+#include "brw_sf.h"
 
 static void upload_sf_vp(struct brw_context *brw)
 {
@@ -121,6 +122,19 @@ const struct brw_tracked_state brw_sf_vp = {
    .prepare = upload_sf_vp
 };
 
+/**
+ * Compute the offset within the URB (expressed in 256-bit register
+ * increments) that should be used to read the VUE in th efragment shader.
+ */
+int
+brw_sf_compute_urb_entry_read_offset(struct intel_context *intel)
+{
+   if (intel->gen == 5)
+      return 3;
+   else
+      return 1;
+}
+
 static void upload_sf_unit( struct brw_context *brw )
 {
    struct intel_context *intel = &brw->intel;
@@ -148,10 +162,8 @@ static void upload_sf_unit( struct brw_context *brw )
 
    sf->thread3.dispatch_grf_start_reg = 3;
 
-   if (intel->gen == 5)
-       sf->thread3.urb_entry_read_offset = 3;
-   else
-       sf->thread3.urb_entry_read_offset = 1;
+   sf->thread3.urb_entry_read_offset =
+      brw_sf_compute_urb_entry_read_offset(intel);
 
    /* CACHE_NEW_SF_PROG */
    sf->thread3.urb_entry_read_length = brw->sf.prog_data->urb_read_length;
-- 
1.7.6



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