[Mesa-dev] [PATCH 2/3] radeon/llvm: support setcc on f32

Tom Stellard tstellar at gmail.com
Tue Aug 21 07:04:37 PDT 2012


On Tue, Aug 21, 2012 at 12:41:08AM +0200, Vincent Lejeune wrote:

A few small comments inline, but otherwise:

Reviewed-by: Tom Stellard <thomas.stellard at amd.com>

> ---
>  src/gallium/drivers/radeon/R600ISelLowering.cpp | 36 ++++++++++++++++++-------
>  1 file changed, 27 insertions(+), 9 deletions(-)
> 
> diff --git a/src/gallium/drivers/radeon/R600ISelLowering.cpp b/src/gallium/drivers/radeon/R600ISelLowering.cpp
> index 4b89f7e..3aeb6ff 100644
> --- a/src/gallium/drivers/radeon/R600ISelLowering.cpp
> +++ b/src/gallium/drivers/radeon/R600ISelLowering.cpp
> @@ -44,7 +44,7 @@ R600TargetLowering::R600TargetLowering(TargetMachine &TM) :
>    setOperationAction(ISD::SELECT_CC, MVT::i32, Custom);
>  
>    setOperationAction(ISD::SETCC, MVT::i32, Custom);
> -
> +  setOperationAction(ISD::SETCC, MVT::f32, Custom);
>  //  setSchedulingPreference(Sched::VLIW);

This code is not commented out in the master branch, so I don't think
this patch will apply cleanly.

>  }
>  
> @@ -458,14 +458,32 @@ SDValue R600TargetLowering::LowerSETCC(SDValue Op, SelectionDAG &DAG) const
>    SDValue CC  = Op.getOperand(2);
>    DebugLoc DL = Op.getDebugLoc();
>    assert(Op.getValueType() == MVT::i32);
> -  Cond = DAG.getNode(
> -      ISD::SELECT_CC,
> -      Op.getDebugLoc(),
> -      MVT::i32,
> -      LHS, RHS,
> -      DAG.getConstant(-1, MVT::i32),
> -      DAG.getConstant(0, MVT::i32),
> -      CC);
> +  if (LHS.getValueType() == MVT::i32) {
> +    Cond = DAG.getNode(
> +        ISD::SELECT_CC,
> +        Op.getDebugLoc(),
> +        MVT::i32,
> +        LHS, RHS,
> +        DAG.getConstant(-1, MVT::i32),
> +        DAG.getConstant(0, MVT::i32),
> +        CC);
> +  } else if (LHS.getValueType() == MVT::f32) {
> +    Cond = DAG.getNode(
> +        ISD::SELECT_CC,
> +        Op.getDebugLoc(),
> +        MVT::f32,
> +        LHS, RHS,
> +        DAG.getConstantFP(1., MVT::f32),
> +        DAG.getConstantFP(0., MVT::f32),

Can you use 1.0f and 0.0f instead of 1. and 0.


> +        CC);
> +    Cond = DAG.getNode(
> +        ISD::FP_TO_SINT,
> +        DL,
> +        MVT::i32,
> +        Cond);
> +  } else {
> +    assert(0 && "Not valid type for set_cc");
> +  }
>    Cond = DAG.getNode(
>        ISD::AND,
>        DL,
> -- 
> 1.7.11.4
> 
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