[Mesa-dev] [PATCH 4/8] i965: Move program dump to a helper function in brw_eu.c.

Eric Anholt eric at anholt.net
Fri Aug 31 11:32:37 PDT 2012


It's going to get more complicated when we do instruction compaction.
---
 src/mesa/drivers/dri/i965/brw_eu.c          |   22 ++++++++++++++++++++
 src/mesa/drivers/dri/i965/brw_eu.h          |    2 ++
 src/mesa/drivers/dri/i965/brw_eu_emit.c     |    1 +
 src/mesa/drivers/dri/i965/brw_fs_emit.cpp   |   27 +++++--------------------
 src/mesa/drivers/dri/i965/brw_vec4_emit.cpp |   29 ++++++---------------------
 src/mesa/drivers/dri/i965/brw_vs_emit.c     |    5 +----
 src/mesa/drivers/dri/i965/brw_wm_emit.c     |    7 ++-----
 7 files changed, 39 insertions(+), 54 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_eu.c b/src/mesa/drivers/dri/i965/brw_eu.c
index 89091db..d5080c3 100644
--- a/src/mesa/drivers/dri/i965/brw_eu.c
+++ b/src/mesa/drivers/dri/i965/brw_eu.c
@@ -220,3 +220,25 @@ const GLuint *brw_get_program( struct brw_compile *p,
    *sz = p->nr_insn * sizeof(struct brw_instruction);
    return (const GLuint *)p->store;
 }
+
+void
+brw_dump_compile(struct brw_compile *p, FILE *out, int start, int end)
+{
+   void *store = p->store;
+
+   for (int offset = start; offset < end; offset += 16) {
+      struct brw_instruction *insn = store + offset;
+
+      printf("0x%08x: ", offset);
+
+      if (0) {
+	 printf("0x%08x 0x%08x 0x%08x 0x%08x ",
+		((uint32_t *)insn)[3],
+		((uint32_t *)insn)[2],
+		((uint32_t *)insn)[1],
+		((uint32_t *)insn)[0]);
+      }
+
+      brw_disasm(stdout, insn, p->brw->intel.gen);
+   }
+}
diff --git a/src/mesa/drivers/dri/i965/brw_eu.h b/src/mesa/drivers/dri/i965/brw_eu.h
index e0e02d4..2fa84df 100644
--- a/src/mesa/drivers/dri/i965/brw_eu.h
+++ b/src/mesa/drivers/dri/i965/brw_eu.h
@@ -112,6 +112,7 @@ struct brw_compile {
    struct brw_instruction *store;
    int store_size;
    GLuint nr_insn;
+   unsigned int next_insn_offset;
 
    void *mem_ctx;
 
@@ -813,6 +814,7 @@ void brw_set_acc_write_control(struct brw_compile *p, GLuint value);
 
 void brw_init_compile(struct brw_context *, struct brw_compile *p,
 		      void *mem_ctx);
+void brw_dump_compile(struct brw_compile *p, FILE *out, int start, int end);
 const GLuint *brw_get_program( struct brw_compile *p, GLuint *sz );
 
 struct brw_instruction *brw_next_insn(struct brw_compile *p, GLuint opcode);
diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c
index b82a858..4d7b76d 100644
--- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c
@@ -711,6 +711,7 @@ brw_next_insn(struct brw_compile *p, GLuint opcode)
          assert(!"realloc eu store memeory failed");
    }
 
+   p->next_insn_offset += 16;
    insn = &p->store[p->nr_insn++];
    memcpy(insn, p->current, sizeof(*insn));
 
diff --git a/src/mesa/drivers/dri/i965/brw_fs_emit.cpp b/src/mesa/drivers/dri/i965/brw_fs_emit.cpp
index 5900c0e..e477a61 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_emit.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_emit.cpp
@@ -724,7 +724,7 @@ brw_reg_from_fs_reg(fs_reg *reg)
 void
 fs_visitor::generate_code()
 {
-   int last_native_inst = p->nr_insn;
+   int last_native_insn_offset = p->next_insn_offset;
    const char *last_annotation_string = NULL;
    ir_instruction *last_annotation_ir = NULL;
 
@@ -1002,16 +1002,8 @@ fs_visitor::generate_code()
       }
 
       if (unlikely(INTEL_DEBUG & DEBUG_WM)) {
-	 for (unsigned int i = last_native_inst; i < p->nr_insn; i++) {
-	    if (0) {
-	       printf("0x%08x 0x%08x 0x%08x 0x%08x ",
-		      ((uint32_t *)&p->store[i])[3],
-		      ((uint32_t *)&p->store[i])[2],
-		      ((uint32_t *)&p->store[i])[1],
-		      ((uint32_t *)&p->store[i])[0]);
-	    }
-	    brw_disasm(stdout, &p->store[i], intel->gen);
-	 }
+	 brw_dump_compile(p, stdout,
+			  last_native_insn_offset, p->next_insn_offset);
 
 	 foreach_list(node, &cfg->block_list) {
 	    fs_bblock_link *link = (fs_bblock_link *)node;
@@ -1030,7 +1022,7 @@ fs_visitor::generate_code()
 	 }
       }
 
-      last_native_inst = p->nr_insn;
+      last_native_insn_offset = p->next_insn_offset;
    }
 
    if (unlikely(INTEL_DEBUG & DEBUG_WM)) {
@@ -1045,15 +1037,6 @@ fs_visitor::generate_code()
     * case you're doing that.
     */
    if (0) {
-      if (unlikely(INTEL_DEBUG & DEBUG_WM)) {
-	 for (unsigned int i = 0; i < p->nr_insn; i++) {
-	    printf("0x%08x 0x%08x 0x%08x 0x%08x ",
-		   ((uint32_t *)&p->store[i])[3],
-		   ((uint32_t *)&p->store[i])[2],
-		   ((uint32_t *)&p->store[i])[1],
-		   ((uint32_t *)&p->store[i])[0]);
-	    brw_disasm(stdout, &p->store[i], intel->gen);
-	 }
-      }
+      brw_dump_compile(p, stdout, 0, p->next_insn_offset);
    }
 }
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_emit.cpp b/src/mesa/drivers/dri/i965/brw_vec4_emit.cpp
index 0a50467..6417fdb 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_emit.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_emit.cpp
@@ -825,7 +825,7 @@ vec4_visitor::run()
 void
 vec4_visitor::generate_code()
 {
-   int last_native_inst = 0;
+   int last_native_insn_offset = 0;
    const char *last_annotation_string = NULL;
    ir_instruction *last_annotation_ir = NULL;
 
@@ -978,19 +978,11 @@ vec4_visitor::generate_code()
       }
 
       if (unlikely(INTEL_DEBUG & DEBUG_VS)) {
-	 for (unsigned int i = last_native_inst; i < p->nr_insn; i++) {
-	    if (0) {
-	       printf("0x%08x 0x%08x 0x%08x 0x%08x ",
-		      ((uint32_t *)&p->store[i])[3],
-		      ((uint32_t *)&p->store[i])[2],
-		      ((uint32_t *)&p->store[i])[1],
-		      ((uint32_t *)&p->store[i])[0]);
-	    }
-	    brw_disasm(stdout, &p->store[i], intel->gen);
-	 }
+	 brw_dump_compile(p, stdout,
+			  last_native_insn_offset, p->next_insn_offset);
       }
 
-      last_native_inst = p->nr_insn;
+      last_native_insn_offset = p->next_insn_offset;
    }
 
    if (unlikely(INTEL_DEBUG & DEBUG_VS)) {
@@ -1004,17 +996,8 @@ vec4_visitor::generate_code()
     * which is often something we want to debug.  So this is here in
     * case you're doing that.
     */
-   if (0) {
-      if (unlikely(INTEL_DEBUG & DEBUG_VS)) {
-	 for (unsigned int i = 0; i < p->nr_insn; i++) {
-	    printf("0x%08x 0x%08x 0x%08x 0x%08x ",
-		   ((uint32_t *)&p->store[i])[3],
-		   ((uint32_t *)&p->store[i])[2],
-		   ((uint32_t *)&p->store[i])[1],
-		   ((uint32_t *)&p->store[i])[0]);
-	    brw_disasm(stdout, &p->store[i], intel->gen);
-	 }
-      }
+   if (0 && unlikely(INTEL_DEBUG & DEBUG_VS)) {
+      brw_dump_compile(p, stdout, 0, p->next_insn_offset);
    }
 }
 
diff --git a/src/mesa/drivers/dri/i965/brw_vs_emit.c b/src/mesa/drivers/dri/i965/brw_vs_emit.c
index 177b2b3..46954bc 100644
--- a/src/mesa/drivers/dri/i965/brw_vs_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_vs_emit.c
@@ -2162,11 +2162,8 @@ void brw_old_vs_emit(struct brw_vs_compile *c )
    brw_optimize(p);
 
    if (unlikely(INTEL_DEBUG & DEBUG_VS)) {
-      int i;
-
       printf("vs-native:\n");
-      for (i = 0; i < p->nr_insn; i++)
-	 brw_disasm(stdout, &p->store[i], intel->gen);
+      brw_dump_compile(p, stdout, 0, p->next_insn_offset);
       printf("\n");
    }
 }
diff --git a/src/mesa/drivers/dri/i965/brw_wm_emit.c b/src/mesa/drivers/dri/i965/brw_wm_emit.c
index b6defa3..0e73ef8 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_emit.c
@@ -1919,11 +1919,8 @@ void brw_wm_emit( struct brw_wm_compile *c )
    }
 
    if (unlikely(INTEL_DEBUG & DEBUG_WM)) {
-      int i;
-
-     printf("wm-native:\n");
-     for (i = 0; i < p->nr_insn; i++)
-	 brw_disasm(stdout, &p->store[i], p->brw->intel.gen);
+      printf("wm-native:\n");
+      brw_dump_compile(p, stdout, 0, p->next_insn_offset);
       printf("\n");
    }
 }
-- 
1.7.10.4



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