[Mesa-dev] [PATCH 07/19] r600g: don't set CB_TARGET_MASK in set_framebuffer_state

Marek Olšák maraeo at gmail.com
Sun Jan 29 11:51:22 PST 2012


It's emitted in draw_vbo, always.
---
 src/gallium/drivers/r600/evergreen_state.c |    8 +-------
 src/gallium/drivers/r600/r600_state.c      |    7 +------
 2 files changed, 2 insertions(+), 13 deletions(-)

diff --git a/src/gallium/drivers/r600/evergreen_state.c b/src/gallium/drivers/r600/evergreen_state.c
index 7fd3a36..9f9a6a1 100644
--- a/src/gallium/drivers/r600/evergreen_state.c
+++ b/src/gallium/drivers/r600/evergreen_state.c
@@ -1523,7 +1523,7 @@ static void evergreen_set_framebuffer_state(struct pipe_context *ctx,
 {
 	struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
 	struct r600_pipe_state *rstate = CALLOC_STRUCT(r600_pipe_state);
-	u32 shader_mask, tl, br, target_mask;
+	u32 shader_mask, tl, br;
 	int tl_x, tl_y, br_x, br_y;
 
 	if (rstate == NULL)
@@ -1548,11 +1548,8 @@ static void evergreen_set_framebuffer_state(struct pipe_context *ctx,
 		rctx->ctx.num_dest_buffers++;
 	}
 
-	target_mask = 0x00000000;
-	target_mask = 0xFFFFFFFF;
 	shader_mask = 0;
 	for (int i = 0; i < state->nr_cbufs; i++) {
-		target_mask ^= 0xf << (i * 4);
 		shader_mask |= 0xf << (i * 4);
 	}
 	tl_x = 0;
@@ -1602,9 +1599,6 @@ static void evergreen_set_framebuffer_state(struct pipe_context *ctx,
 	r600_pipe_state_add_reg(rstate,
 				R_028230_PA_SC_EDGERULE, 0xAAAAAAAA,
 				0xFFFFFFFF, NULL, 0);
-
-	r600_pipe_state_add_reg(rstate, R_028238_CB_TARGET_MASK,
-				0x00000000, target_mask, NULL, 0);
 	r600_pipe_state_add_reg(rstate, R_02823C_CB_SHADER_MASK,
 				shader_mask, 0xFFFFFFFF, NULL, 0);
 
diff --git a/src/gallium/drivers/r600/r600_state.c b/src/gallium/drivers/r600/r600_state.c
index 98c22f6..895d46e 100644
--- a/src/gallium/drivers/r600/r600_state.c
+++ b/src/gallium/drivers/r600/r600_state.c
@@ -1593,7 +1593,7 @@ static void r600_set_framebuffer_state(struct pipe_context *ctx,
 {
 	struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
 	struct r600_pipe_state *rstate = CALLOC_STRUCT(r600_pipe_state);
-	u32 shader_mask, tl, br, shader_control, target_mask;
+	u32 shader_mask, tl, br, shader_control;
 
 	if (rstate == NULL)
 		return;
@@ -1616,12 +1616,9 @@ static void r600_set_framebuffer_state(struct pipe_context *ctx,
 		rctx->ctx.num_dest_buffers++;
 	}
 
-	target_mask = 0x00000000;
-	target_mask = 0xFFFFFFFF;
 	shader_mask = 0;
 	shader_control = 0;
 	for (int i = 0; i < state->nr_cbufs; i++) {
-		target_mask ^= 0xf << (i * 4);
 		shader_mask |= 0xf << (i * 4);
 		shader_control |= 1 << i;
 	}
@@ -1663,8 +1660,6 @@ static void r600_set_framebuffer_state(struct pipe_context *ctx,
 
 	r600_pipe_state_add_reg(rstate, R_0287A0_CB_SHADER_CONTROL,
 				shader_control, 0xFFFFFFFF, NULL, 0);
-	r600_pipe_state_add_reg(rstate, R_028238_CB_TARGET_MASK,
-				0x00000000, target_mask, NULL, 0);
 	r600_pipe_state_add_reg(rstate, R_02823C_CB_SHADER_MASK,
 				shader_mask, 0xFFFFFFFF, NULL, 0);
 	r600_pipe_state_add_reg(rstate, R_028C04_PA_SC_AA_CONFIG,
-- 
1.7.5.4



More information about the mesa-dev mailing list