[Mesa-dev] [PATCH 3/8] i965/msaa: Allocate MCS buffer when CMS MSAA is in use.

Chad Versace chad.versace at linux.intel.com
Mon Jul 9 13:36:29 PDT 2012


On 07/06/2012 03:29 PM, Paul Berry wrote:
> To implement Gen7's CMS MSAA layout, we need an extra buffer, the MCS
> (Multisample Control Surface) buffer.  This patch introduces code for
> allocating and deallocating the buffer, and storing a pointer to it in
> the intel_mipmap_tree struct.
> 
> No functional change, since the CMS layout is not enabled yet.
> ---
>  src/mesa/drivers/dri/intel/intel_fbo.c         |    9 +++++
>  src/mesa/drivers/dri/intel/intel_mipmap_tree.c |   45 ++++++++++++++++++++++++
>  src/mesa/drivers/dri/intel/intel_mipmap_tree.h |   14 +++++++
>  3 files changed, 68 insertions(+), 0 deletions(-)
> 
> diff --git a/src/mesa/drivers/dri/intel/intel_fbo.c b/src/mesa/drivers/dri/intel/intel_fbo.c
> index a801bb7..6530b99 100644
> --- a/src/mesa/drivers/dri/intel/intel_fbo.c
> +++ b/src/mesa/drivers/dri/intel/intel_fbo.c
> @@ -282,6 +282,15 @@ intel_alloc_renderbuffer_storage(struct gl_context * ctx, struct gl_renderbuffer
>        }
>     }
>  
> +   if (irb->mt->msaa_layout == INTEL_MSAA_LAYOUT_CMS) {
> +      bool ok = intel_miptree_alloc_mcs(intel, irb->mt, rb->NumSamples);
> +      if (!ok) {
> +         intel_miptree_release(&irb->mt->hiz_mt);
> +         intel_miptree_release(&irb->mt);
> +         return false;
> +      }
> +   }
> +
>     return true;
>  }

FYI, though it causes no harm, there's no need to release the hiz miptree
separately from its parent. The miptree's destructor takes care of that.


> +   /* From the Ivy Bridge PRM, Vol 2 Part 1 p326:
> +    *
> +    *     When MCS buffer is enabled and bound to MSRT, it is required that it
> +    *     is cleared prior to any rendering.
> +    *
> +    * Since we don't use the MCS buffer for any purpose other than rendering,
> +    * it makes sense to just clear it immediately upon allocation.
> +    */
> +   void *data = intel_region_map(intel, mt->mcs_mt->region, 0);
> +   memset(data, 0, mt->mcs_mt->region->bo->size);
> +   intel_region_unmap(intel, mt->mcs_mt->region);

But the clear value for a 4x MCS is 0xff. Am I missing something?

-Chad


More information about the mesa-dev mailing list