[Mesa-dev] [PATCH 8/8] intel: Add some PCI IDs for Haswell.

[Kenneth Graunke]

Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
---
 include/pci_ids/i965_pci_ids.h             |    5 +++++
 src/mesa/drivers/dri/intel/intel_chipset.h |   13 +++++++++++--
 2 files changed, 16 insertions(+), 2 deletions(-)

diff --git a/include/pci_ids/i965_pci_ids.h b/include/pci_ids/i965_pci_ids.h
index d37a2ee..a291509 100644
--- a/include/pci_ids/i965_pci_ids.h
+++ b/include/pci_ids/i965_pci_ids.h
@@ -25,3 +25,8 @@ CHIPSET(0x0162, IVYBRIDGE_GT2, ivb_gt2)
 CHIPSET(0x0156, IVYBRIDGE_M_GT1, ivb_gt1)
 CHIPSET(0x0166, IVYBRIDGE_M_GT2, ivb_gt2)
 CHIPSET(0x015a, IVYBRIDGE_S_GT1, ivb_gt1)
+CHIPSET(0x0402, HASWELL_GT1, hsw_gt1)
+CHIPSET(0x0412, HASWELL_GT2, hsw_gt2)
+CHIPSET(0x0406, HASWELL_M_GT1, hsw_gt1)
+CHIPSET(0x0416, HASWELL_M_GT2, hsw_gt2)
+CHIPSET(0x0A16, HASWELL_M_ULT_GT2, hsw_gt2)
diff --git a/src/mesa/drivers/dri/intel/intel_chipset.h b/src/mesa/drivers/dri/intel/intel_chipset.h
index eefb430..424c70c 100644
--- a/src/mesa/drivers/dri/intel/intel_chipset.h
+++ b/src/mesa/drivers/dri/intel/intel_chipset.h
@@ -86,6 +86,12 @@
 #define PCI_CHIP_IVYBRIDGE_M_GT2        0x0166
 #define PCI_CHIP_IVYBRIDGE_S_GT1        0x015a  /* Server */
 
+#define PCI_CHIP_HASWELL_GT1            0x0402 /* Desktop */
+#define PCI_CHIP_HASWELL_GT2            0x0412
+#define PCI_CHIP_HASWELL_M_GT1          0x0406 /* Mobile */
+#define PCI_CHIP_HASWELL_M_GT2          0x0416
+#define PCI_CHIP_HASWELL_M_ULT_GT2      0x0A16 /* Mobile ULT */
+
 #define IS_MOBILE(devid)	(devid == PCI_CHIP_I855_GM || \
 				 devid == PCI_CHIP_I915_GM || \
 				 devid == PCI_CHIP_I945_GM || \
@@ -154,8 +160,11 @@
 #define IS_GEN7(devid)	        (IS_IVYBRIDGE(devid) || \
 				 IS_HASWELL(devid))
 
-#define IS_HSW_GT1(devid)	0
-#define IS_HSW_GT2(devid)	0
+#define IS_HSW_GT1(devid)	(devid == PCI_CHIP_HASWELL_GT1 || \
+				 devid == PCI_CHIP_HASWELL_M_GT1)
+#define IS_HSW_GT2(devid)	(devid == PCI_CHIP_HASWELL_GT2 || \
+				 devid == PCI_CHIP_HASWELL_M_GT2 || \
+				 devid == PCI_CHIP_HASWELL_M_ULT_GT2)
 
 #define IS_HASWELL(devid)       (IS_HSW_GT1(devid) || \
 				 IS_HSW_GT2(devid))
-- 
1.7.7.6