[Mesa-dev] Loading and executing an R600 program

[Alex Deucher]

On Wed, May 16, 2012 at 6:05 PM, Miguel Ramos
<org.mesa3d at miguel.ramos.name> wrote:
> 2012/5/16 Alex Deucher <alexdeucher at gmail.com>:
>> On Wed, May 16, 2012 at 6:36 AM, Miguel Ramos
>> <org.mesa3d at miguel.ramos.name> wrote:
>>> Hi,
>>>
>>> This question is not related to mesa itself, so sorry to use your
>>> mailing list, however, I know here someone will have the knowledge to
>>> help me.
>>> I'm trying to learn something about GPUs and would like to write some
>>> assembly language.
>>> The source code for mesa seems to be valuable documentation.
>>>
>>
>> There shader ISA is well documented.  See the Documentation links at
>> the bottom of this page:
>> http://www.x.org/wiki/RadeonFeature
>>
>>> I see that the gallium/radeon driver has a lot of R600 ISA and also IL
>>> code, I have been browsing through it for the past hours (only).
>>> Somewhere, there will be something that sends this code to the GPU and
>>> executes it, maybe through some DRM interface.
>>>
>>> And that is what I want to do (load and execute an R600 ISA program),
>>> but I couldn't find it yet.
>>> If someone on this list can put me in the right direction, maybe
>>> kindly point me to a specific source or header file, I would
>>> appreciate very much.
>>
>> The hw doesn't really work like that.  Shaders are part of a pipeline
>> (3D pipeline on older asics, 3D or compute on newer asics).  You need
>> to set up the state of that pipeline as well as any resources you want
>> to use in your shader.  The easiest way to do that is to write an
>> OpenGL application using GLSL and look at the compiler output in the
>> driver.  If you want to write a program in r600 assembly directly, you
>> can use something like radeondemo, but then you are also responsible
>> for setting up the pipeline state yourself.  You can start with the
>> basic demo code in radeondemo and edit the shader and pipeline state
>> yourself:
>> http://cgit.freedesktop.org/~airlied/radeondemo
>>
>> Alex
>
> Thanks, the radeondemo seems to have the practical information I need
> which is not in the ISA documentation.
> I'm trying to do this in the context of GPGPU, I think that is also
> one of the simpler cases of pipeline setup. You will probably think I
> should be better off using the ATI driver and CAL, but the
> documentation is no longer very easy to find for that too. So, I
> figured if I can setup the pipeline and execute something with DRM,
> then, afterwards all problems are problems covered within the ISA
> documentation.

Initial OpenCL support is starting to fall into place in mesa, but
it's focused on evergreen and newer asics as they have a dedicated
compute pipeline in addition to the 3D pipeline.  The compute pipeline
is a lot simpler to set up compared to the 3D pipeline.  See:
http://dri.freedesktop.org/wiki/GalliumCompute
for more info on OpenCL support.  Also, Adam Rak has some demo
programs similar to radeondemo for the compute pipeline on evergreen+:
https://github.com/rakadam

Alex

>
> Thank you,
>
> Miguel