[Mesa-dev] [PATCH 07/15] i965/blorp: Use 16 pixel dispatch on Gen7 when there is a WM program.
chad.versace at linux.intel.com
Wed May 23 11:15:12 PDT 2012
-----BEGIN PGP SIGNED MESSAGE-----
On 05/23/2012 10:22 AM, Kenneth Graunke wrote:
> On 05/23/2012 07:45 AM, Paul Berry wrote:
>> On 22 May 2012 13:02, Eric Anholt <eric at anholt.net
>> <mailto:eric at anholt.net>> wrote:
>> On Fri, 11 May 2012 11:03:50 -0700, Paul Berry
>> <stereotype441 at gmail.com <mailto:stereotype441 at gmail.com>> wrote:
>> > When executing a blorp operation on Gen7 that does not need a WM
>> > program (i.e. a HiZ operation), we use 32-pixel dispatch mode because
>> > it's faster. However, when executing a blorp operation that does
>> > a WM program, we need to use 16-pixel dispatch, because blorp WM
>> > programs are compiled assuming 16-pixel dispatch.
>> I didn't think dispatch mode means anything unless you're actually
>> dispatching a thread (though I could see how having no dispatch mode set
>> might anger things). Basically, I'm thinking just always set 16, unless
>> there is some efficiency reason I don't know of.
>> I don't honestly know. Chad, I inherited the 32-pixel dispatch from
>> your HiZ code, and assumed you did it on purpose because it was faster.
>> But I didn't actually do any tests. Do you have any thoughts about this?
> I recall Chad saying that not setting thread dispatch broke horribly, so since he had enable thread dispatch, he picked the widest mode.
What Ken said.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2.0.19 (GNU/Linux)
Comment: Using GnuPG with Mozilla - http://enigmail.mozdev.org/
-----END PGP SIGNATURE-----
More information about the mesa-dev