[Mesa-dev] [PATCH 4/4] radeonsi: Enable whole quad for pixel shaders.

Michel Dänzer michel at daenzer.net
Thu Sep 6 04:00:03 PDT 2012


From: Michel Dänzer <michel.daenzer at amd.com>

Fixes wrong mipmap level being sampled at some triangle edges.

Signed-off-by: Michel Dänzer <michel.daenzer at amd.com>
---
 src/gallium/drivers/radeonsi/radeonsi_shader.c |   12 ++++++++++--
 1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/radeonsi_shader.c b/src/gallium/drivers/radeonsi/radeonsi_shader.c
index 8c92149..1c330b5 100644
--- a/src/gallium/drivers/radeonsi/radeonsi_shader.c
+++ b/src/gallium/drivers/radeonsi/radeonsi_shader.c
@@ -75,7 +75,7 @@ struct si_shader_context
 	struct tgsi_token * tokens;
 	struct si_pipe_shader *shader;
 	unsigned type; /* TGSI_PROCESSOR_* specifies the type of shader. */
-/*	unsigned num_inputs; */
+	unsigned ninput_emitted;
 /*	struct list_head inputs; */
 /*	unsigned * input_mappings *//* From TGSI to SI hw */
 /*	struct tgsi_shader_info info;*/
@@ -319,6 +319,14 @@ static void declare_input_fs(
 		return;
 	}
 
+	if (!si_shader_ctx->ninput_emitted++) {
+		/* Enable whole quad mode */
+		lp_build_intrinsic(gallivm->builder,
+				   "llvm.SI.wqm",
+				   LLVMVoidTypeInContext(gallivm->context),
+				   NULL, 0);
+	}
+
 	/* XXX: Could there be more than TGSI_NUM_CHANNELS (4) ? */
 	for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
 		LLVMValueRef args[3];
@@ -689,7 +697,7 @@ int si_pipe_shader_create(
 
 	dump = debug_get_bool_option("RADEON_DUMP_SHADERS", FALSE);
 
-	memset(&si_shader_ctx.radeon_bld, 0, sizeof(si_shader_ctx.radeon_bld));
+	memset(&si_shader_ctx, 0, sizeof(si_shader_ctx));
 	radeon_llvm_context_init(&si_shader_ctx.radeon_bld);
 	bld_base = &si_shader_ctx.radeon_bld.soa.bld_base;
 
-- 
1.7.10.4



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