[Mesa-dev] [PATCH 03/15] i965/fs: Add support for translating ir_triop_fma into MAD.

Paul Berry stereotype441 at gmail.com
Fri Aug 23 08:27:33 PDT 2013


On 22 August 2013 16:08, Matt Turner <mattst88 at gmail.com> wrote:

> ---
>  src/mesa/drivers/dri/i965/brw_fs.cpp                     | 1 +
>  src/mesa/drivers/dri/i965/brw_fs.h                       | 1 +
>  src/mesa/drivers/dri/i965/brw_fs_channel_expressions.cpp | 1 +
>  src/mesa/drivers/dri/i965/brw_fs_visitor.cpp             | 7 +++++++
>  4 files changed, 10 insertions(+)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
> b/src/mesa/drivers/dri/i965/brw_fs.cpp
> index 52fa6f4..b770c0e 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
> @@ -179,6 +179,7 @@ ALU3(BFI2)
>  ALU1(FBH)
>  ALU1(FBL)
>  ALU1(CBIT)
> +ALU3(MAD)
>
>  /** Gen4 predicated IF. */
>  fs_inst *
> diff --git a/src/mesa/drivers/dri/i965/brw_fs.h
> b/src/mesa/drivers/dri/i965/brw_fs.h
> index 9d240b5..cb4ac3b 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs.h
> +++ b/src/mesa/drivers/dri/i965/brw_fs.h
> @@ -285,6 +285,7 @@ public:
>     fs_inst *FBH(fs_reg dst, fs_reg value);
>     fs_inst *FBL(fs_reg dst, fs_reg value);
>     fs_inst *CBIT(fs_reg dst, fs_reg value);
> +   fs_inst *MAD(fs_reg dst, fs_reg c, fs_reg b, fs_reg a);
>
>     int type_size(const struct glsl_type *type);
>     fs_inst *get_instruction_generating_reg(fs_inst *start,
> diff --git a/src/mesa/drivers/dri/i965/brw_fs_channel_expressions.cpp
> b/src/mesa/drivers/dri/i965/brw_fs_channel_expressions.cpp
> index 4afae24..fa02d9b 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs_channel_expressions.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_fs_channel_expressions.cpp
> @@ -360,6 +360,7 @@
> ir_channel_expressions_visitor::visit_leave(ir_assignment *ir)
>        assert(!"not yet supported");
>        break;
>
> +   case ir_triop_fma:
>     case ir_triop_lrp:
>     case ir_triop_bitfield_extract:
>        for (i = 0; i < vector_elements; i++) {
> diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
> b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
> index 964ad40..ac85d25 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
> @@ -717,6 +717,13 @@ fs_visitor::visit(ir_expression *ir)
>        break;
>     }
>
> +   case ir_triop_fma:
> +      /* Note that the instruction's argument order is reversed from GLSL
> +       * and the IR.
> +       */
> +      emit(MAD(this->result, op[2], op[1], op[0]));
> +      break;
> +
>

What happens if one of the ops is in a form that we can't encode in a 3-op
instruction (e.g. a constant)?  That's handled in patch 4/15 for the vs,
and it's handled inside emit_lrp, but I don't see it handled here.


>     case ir_triop_lrp:
>        emit_lrp(this->result, op[0], op[1], op[2]);
>        break;
> --
> 1.8.3.2
>
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