[Mesa-dev] [PATCH] R600/SI: Handle VGPR64 destination in copyPhysReg().

Tom Stellard tom at stellard.net
Tue Feb 5 12:19:48 PST 2013


On Tue, Feb 05, 2013 at 09:03:47PM +0100, Michel Dänzer wrote:
> From: Michel Dänzer <michel.daenzer at amd.com>
> 
> Allows nexuiz to run with radeonsi.
>

Nice!

Reviewed-by: Tom Stellard <thomas.stellard at amd.com>

> Signed-off-by: Michel Dänzer <michel.daenzer at amd.com>
> ---
>  lib/Target/R600/SIInstrInfo.cpp |   10 +++++++++-
>  1 file changed, 9 insertions(+), 1 deletion(-)
> 
> diff --git a/lib/Target/R600/SIInstrInfo.cpp b/lib/Target/R600/SIInstrInfo.cpp
> index 011ec50..2a6271c 100644
> --- a/lib/Target/R600/SIInstrInfo.cpp
> +++ b/lib/Target/R600/SIInstrInfo.cpp
> @@ -42,7 +42,15 @@ SIInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
>    // never be necessary.
>    assert(DestReg != AMDGPU::SCC && SrcReg != AMDGPU::SCC);
>  
> -  if (AMDGPU::SReg_64RegClass.contains(DestReg)) {
> +  if (AMDGPU::VReg_64RegClass.contains(DestReg)) {
> +    assert(AMDGPU::VReg_64RegClass.contains(SrcReg) ||
> +	   AMDGPU::SReg_64RegClass.contains(SrcReg));
> +    BuildMI(MBB, MI, DL, get(AMDGPU::V_MOV_B32_e32), RI.getSubReg(DestReg, AMDGPU::sub0))
> +            .addReg(RI.getSubReg(SrcReg, AMDGPU::sub0), getKillRegState(KillSrc))
> +            .addReg(DestReg, RegState::Define | RegState::Implicit);
> +    BuildMI(MBB, MI, DL, get(AMDGPU::V_MOV_B32_e32), RI.getSubReg(DestReg, AMDGPU::sub1))
> +            .addReg(RI.getSubReg(SrcReg, AMDGPU::sub1), getKillRegState(KillSrc));
> +  } else if (AMDGPU::SReg_64RegClass.contains(DestReg)) {
>      assert(AMDGPU::SReg_64RegClass.contains(SrcReg));
>      BuildMI(MBB, MI, DL, get(AMDGPU::S_MOV_B64), DestReg)
>              .addReg(SrcReg, getKillRegState(KillSrc));
> -- 
> 1.7.10.4
> 
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