[Mesa-dev] [PATCH 2/3] radeonsi: Handle TGSI_OPCODE_TXD

Michel Dänzer michel at daenzer.net
Fri Feb 22 08:02:38 PST 2013


From: Michel Dänzer <michel.daenzer at amd.com>


Signed-off-by: Michel Dänzer <michel.daenzer at amd.com>
---
 src/gallium/drivers/radeonsi/radeonsi_shader.c | 23 +++++++++++++++++++++--
 1 file changed, 21 insertions(+), 2 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/radeonsi_shader.c b/src/gallium/drivers/radeonsi/radeonsi_shader.c
index b5925b5..d88d208 100644
--- a/src/gallium/drivers/radeonsi/radeonsi_shader.c
+++ b/src/gallium/drivers/radeonsi/radeonsi_shader.c
@@ -826,6 +826,7 @@ static void tex_fetch_args(
 	const struct tgsi_full_instruction * inst = emit_data->inst;
 	unsigned opcode = inst->Instruction.Opcode;
 	unsigned target = inst->Texture.Texture;
+	unsigned sampler_src;
 	LLVMValueRef ptr;
 	LLVMValueRef offset;
 	LLVMValueRef coords[4];
@@ -907,6 +908,15 @@ static void tex_fetch_args(
 		address[count++] = lp_build_emit_fetch(bld_base, inst, 1, 0);
 	}
 
+	/* Pack user derivatives */
+	if (opcode == TGSI_OPCODE_TXD) {
+		for (chan = 0; chan < 2; chan++) {
+			address[count++] = lp_build_emit_fetch(bld_base, inst, 1, chan);
+			if (num_coords > 1)
+				address[count++] = lp_build_emit_fetch(bld_base, inst, 2, chan);
+		}
+	}
+
 	/* Pack texture coordinates */
 	address[count++] = coords[0];
 	if (num_coords > 1)
@@ -954,17 +964,19 @@ static void tex_fetch_args(
 
 	emit_data->args[1] = lp_build_gather_values(gallivm, address, count);
 
+	sampler_src = emit_data->inst->Instruction.NumSrcRegs - 1;
+
 	/* Resource */
 	ptr = use_sgpr(bld_base->base.gallivm, SGPR_CONST_PTR_V8I32, SI_SGPR_RESOURCE);
 	offset = lp_build_const_int32(bld_base->base.gallivm,
-				  emit_data->inst->Src[1].Register.Index);
+				  emit_data->inst->Src[sampler_src].Register.Index);
 	emit_data->args[2] = build_indexed_load(bld_base->base.gallivm,
 						ptr, offset);
 
 	/* Sampler */
 	ptr = use_sgpr(bld_base->base.gallivm, SGPR_CONST_PTR_V4I32, SI_SGPR_SAMPLER);
 	offset = lp_build_const_int32(bld_base->base.gallivm,
-				  emit_data->inst->Src[1].Register.Index);
+				  emit_data->inst->Src[sampler_src].Register.Index);
 	emit_data->args[3] = build_indexed_load(bld_base->base.gallivm,
 						ptr, offset);
 
@@ -1006,6 +1018,12 @@ static const struct lp_build_tgsi_action txb_action = {
 	.intr_name = "llvm.SI.sampleb."
 };
 
+static const struct lp_build_tgsi_action txd_action = {
+	.fetch_args = tex_fetch_args,
+	.emit = build_tex_intrinsic,
+	.intr_name = "llvm.SI.sampled."
+};
+
 static const struct lp_build_tgsi_action txl_action = {
 	.fetch_args = tex_fetch_args,
 	.emit = build_tex_intrinsic,
@@ -1054,6 +1072,7 @@ int si_pipe_shader_create(
 
 	bld_base->op_actions[TGSI_OPCODE_TEX] = tex_action;
 	bld_base->op_actions[TGSI_OPCODE_TXB] = txb_action;
+	bld_base->op_actions[TGSI_OPCODE_TXD] = txd_action;
 	bld_base->op_actions[TGSI_OPCODE_TXL] = txl_action;
 	bld_base->op_actions[TGSI_OPCODE_TXP] = tex_action;
 
-- 
1.8.1.3



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