[Mesa-dev] [PATCH V4 17/19] i965/vs: add support for ir_txf_ms on Gen6+

Chris Forbes chrisf at ijw.co.nz
Tue Feb 26 02:10:58 PST 2013


On Gen6, lower this to `ld` with lod=0 and an extra sample_index
parameter.

On Gen7, use `ld2dms`. This takes an additional MCS parameter to support
compressed multisample surfaces, but we're not enabling them for
multisample textures for now, so it's always ignored and can be safely
omitted.

V2: Reworked completely, added support for Gen7.
V3: - Use new sample_index, sample_index_type rather than reusing lod
    - Clarify commit message.
V4: - Fix comment style

Signed-off-by: Chris Forbes <chrisf at ijw.co.nz>
Reviewed-by: Eric Anholt <eric at anholt.net>
---
 src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 25 +++++++++++++++++++++----
 1 file changed, 21 insertions(+), 4 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
index ae4cf7d..e7fe6d5 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
@@ -2094,8 +2094,8 @@ vec4_visitor::visit(ir_texture *ir)
       shadow_comparitor = this->result;
    }
 
-   const glsl_type *lod_type;
-   src_reg lod, dPdx, dPdy;
+   const glsl_type *lod_type, *sample_index_type;
+   src_reg lod, dPdx, dPdy, sample_index;
    switch (ir->op) {
    case ir_tex:
       lod = src_reg(0.0f);
@@ -2108,6 +2108,11 @@ vec4_visitor::visit(ir_texture *ir)
       lod = this->result;
       lod_type = ir->lod_info.lod->type;
       break;
+   case ir_txf_ms:
+      ir->lod_info.sample_index->accept(this);
+      sample_index = this->result;
+      sample_index_type = ir->lod_info.sample_index->type;
+      break;
    case ir_txd:
       ir->lod_info.grad.dPdx->accept(this);
       dPdx = this->result;
@@ -2133,6 +2138,9 @@ vec4_visitor::visit(ir_texture *ir)
    case ir_txf:
       inst = new(mem_ctx) vec4_instruction(this, SHADER_OPCODE_TXF);
       break;
+   case ir_txf_ms:
+      inst = new(mem_ctx) vec4_instruction(this, SHADER_OPCODE_TXF_MS);
+      break;
    case ir_txs:
       inst = new(mem_ctx) vec4_instruction(this, SHADER_OPCODE_TXS);
       break;
@@ -2219,8 +2227,17 @@ vec4_visitor::visit(ir_texture *ir)
 	 }
 	 emit(MOV(dst_reg(MRF, mrf, lod_type, writemask), lod));
       } else if (ir->op == ir_txf) {
-	 emit(MOV(dst_reg(MRF, param_base, lod_type, WRITEMASK_W),
-		  lod));
+         emit(MOV(dst_reg(MRF, param_base, lod_type, WRITEMASK_W), lod));
+      } else if (ir->op == ir_txf_ms) {
+         emit(MOV(dst_reg(MRF, param_base + 1, sample_index_type, WRITEMASK_X),
+                  sample_index));
+         inst->mlen++;
+
+         /* on Gen7, there is an additional MCS parameter here after SI,
+          * but we don't bother to emit it since it's always zero. If
+          * we start supporting texturing from CMS surfaces, this will have
+          * to change
+          */
       } else if (ir->op == ir_txd) {
 	 const glsl_type *type = lod_type;
 
-- 
1.8.1.4



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