[Mesa-dev] [RFC 08/13] i965: support for setting surfaces for planar external

Topi Pohjolainen topi.pohjolainen at intel.com
Tue Feb 26 05:18:59 PST 2013


Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
---
 src/mesa/drivers/dri/i965/brw_wm_surface_state.c  |   36 +++++++++++++++++++++
 src/mesa/drivers/dri/i965/gen7_wm_surface_state.c |   36 +++++++++++++++++++++
 2 files changed, 72 insertions(+)

diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index 649d988..0be9a84 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -886,6 +886,35 @@ brw_update_texture_component(struct brw_context *brw,
 }
 
 static void
+brw_update_ext_texture_surface(struct brw_context *brw,
+                               uint32_t *binding_table_slots,
+                               const struct intel_texture_image *intel_img)
+{
+   unsigned i;
+   const struct intel_region *region = intel_img->mt->region;
+   const struct intel_image_format *f = intel_img->ext_format;
+
+   for (i = 0; i < f->nplanes; ++i) {
+      int format = BRW_SURFACEFORMAT_R8_UNORM;
+      int index = f->planes[i].buffer_index;
+
+      if (f->planes[i].dri_format == __DRI_IMAGE_FORMAT_GR88)
+         format = BRW_SURFACEFORMAT_R8G8_UNORM;
+
+      brw_update_texture_component(brw, binding_table_slots + i,
+         intel_img->mt,
+         region->width >> f->planes[i].width_shift,
+         region->height >> f->planes[i].height_shift,
+         intel_img->base.Base.Depth,
+         intel_img->ext_strides[index],
+         BRW_SURFACE_2D,
+         format,
+         intel_img->ext_offsets[index],
+         0);
+   }
+}
+
+static void
 brw_update_texture_surface(struct gl_context *ctx,
                            unsigned unit,
                            uint32_t *binding_table,
@@ -896,6 +925,8 @@ brw_update_texture_surface(struct gl_context *ctx,
    struct intel_texture_object *intelObj = intel_texture_object(tObj);
    struct intel_mipmap_tree *mt = intelObj->mt;
    struct gl_texture_image *firstImage = tObj->Image[0][tObj->BaseLevel];
+   const struct intel_texture_image *intel_img =
+      (const struct intel_texture_image *)firstImage;
    struct gl_sampler_object *sampler = _mesa_get_samplerobj(ctx, unit);
    int width, height, depth;
 
@@ -903,6 +934,11 @@ brw_update_texture_surface(struct gl_context *ctx,
       brw_update_buffer_texture_surface(ctx, unit, binding_table, surf_index);
       return;
    }
+   else if (tObj->Target == GL_TEXTURE_EXTERNAL_OES && intel_img->ext_format) {
+      brw_update_ext_texture_surface(brw, binding_table + surf_index,
+                                     intel_img); 
+      return;
+   }
 
    intel_miptree_get_dimensions_for_image(firstImage, &width, &height, &depth);
 
diff --git a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
index b6cf4d9..6a657c4 100644
--- a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
@@ -340,6 +340,34 @@ gen7_update_texture_component(struct brw_context *brw,
 }
 
 static void
+gen7_update_ext_texture_surface(struct brw_context *brw,
+                                uint32_t *binding_table_slots,
+                                const struct intel_texture_image *intel_img)
+{
+   unsigned i;
+   const struct intel_region *region = intel_img->mt->region;
+   const struct intel_image_format *f = intel_img->ext_format;
+
+   for (i = 0; i < f->nplanes; ++i) {
+      int format = BRW_SURFACEFORMAT_R8_UNORM;
+      int index = f->planes[i].buffer_index;
+
+      if (f->planes[i].dri_format == __DRI_IMAGE_FORMAT_GR88)
+         format = BRW_SURFACEFORMAT_R8G8_UNORM;
+
+      gen7_update_texture_component(brw, binding_table_slots + i,
+         intel_img->mt,
+         region->width >> f->planes[i].width_shift,
+         region->height >> f->planes[i].height_shift,
+         intel_img->base.Base.Depth, intel_img->ext_strides[index],
+         GL_TEXTURE_EXTERNAL_OES,
+         format,
+         intel_img->ext_offsets[index],
+         0, 0);
+   }
+}
+
+static void
 gen7_update_texture_surface(struct gl_context *ctx,
                             unsigned unit,
                             uint32_t *binding_table,
@@ -351,6 +379,8 @@ gen7_update_texture_surface(struct gl_context *ctx,
    struct intel_texture_object *intelObj = intel_texture_object(tObj);
    struct intel_mipmap_tree *mt = intelObj->mt;
    struct gl_texture_image *firstImage = tObj->Image[0][tObj->BaseLevel];
+   const struct intel_texture_image *intel_img =
+      (const struct intel_texture_image *)firstImage;
    struct gl_sampler_object *sampler = _mesa_get_samplerobj(ctx, unit);
    int width, height, depth;
    int swizzle = 0;
@@ -359,6 +389,12 @@ gen7_update_texture_surface(struct gl_context *ctx,
       gen7_update_buffer_texture_surface(ctx, unit, binding_table, surf_index);
       return;
    }
+   else if (tObj->Target == GL_TEXTURE_EXTERNAL_OES && intel_img->ext_format) {
+      gen7_update_ext_texture_surface(brw, binding_table + surf_index,
+                                      intel_img);
+      return;
+   }
+
 
    /* We don't support MSAA for textures. */
    assert(!mt->array_spacing_lod0);
-- 
1.7.9.5



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