[Mesa-dev] [PATCH 01/10] i915: Convert state->draw/depth_region to a BO pointer.

Eric Anholt eric at anholt.net
Mon Jan 28 21:00:29 PST 2013


We don't need any of the other fields at that point.
---
 src/mesa/drivers/dri/i915/i830_context.h |   10 ++++-----
 src/mesa/drivers/dri/i915/i830_vtbl.c    |   33 +++++++++++++++++------------
 src/mesa/drivers/dri/i915/i915_context.h |   13 ++++--------
 src/mesa/drivers/dri/i915/i915_vtbl.c    |   34 +++++++++++++++++-------------
 4 files changed, 46 insertions(+), 44 deletions(-)

diff --git a/src/mesa/drivers/dri/i915/i830_context.h b/src/mesa/drivers/dri/i915/i830_context.h
index ab6222b..aa3e0ce 100644
--- a/src/mesa/drivers/dri/i915/i830_context.h
+++ b/src/mesa/drivers/dri/i915/i830_context.h
@@ -124,13 +124,11 @@ struct i830_hw_state
    GLuint TexBlend[I830_TEX_UNITS][I830_TEXBLEND_SIZE];
    GLuint TexBlendWordsUsed[I830_TEX_UNITS];
 
-   struct intel_region *draw_region;
-   struct intel_region *depth_region;
-
-   /* Regions aren't actually that appropriate here as the memory may
-    * be from a PBO or FBO.  Will have to do this for draw and depth for
-    * FBO's...
+   /* BOs for relocations at state emit time.  The other state parameters are
+    * pre-calculated before the state emits, so only the BOs need to be
+    * available at that point.
     */
+   drm_intel_bo *color_bo, *depth_bo;
    drm_intel_bo *tex_buffer[I830_TEX_UNITS];
    GLuint tex_offset[I830_TEX_UNITS];
 
diff --git a/src/mesa/drivers/dri/i915/i830_vtbl.c b/src/mesa/drivers/dri/i915/i830_vtbl.c
index 6019852..c75a786 100644
--- a/src/mesa/drivers/dri/i915/i830_vtbl.c
+++ b/src/mesa/drivers/dri/i915/i830_vtbl.c
@@ -443,9 +443,8 @@ i830_emit_state(struct intel_context *intel)
 
    aper_array[aper_count++] = intel->batch.bo;
    if (dirty & I830_UPLOAD_BUFFERS) {
-      aper_array[aper_count++] = state->draw_region->bo;
-      if (state->depth_region)
-         aper_array[aper_count++] = state->depth_region->bo;
+      aper_array[aper_count++] = state->color_bo;
+      aper_array[aper_count++] = state->depth_bo;
    }
 
    for (i = 0; i < I830_TEX_UNITS; i++)
@@ -495,19 +494,19 @@ i830_emit_state(struct intel_context *intel)
 
       DBG("I830_UPLOAD_BUFFERS:\n");
 
-      if (state->depth_region)
+      if (state->depth_bo)
           count += 3;
 
       BEGIN_BATCH(count);
       OUT_BATCH(state->Buffer[I830_DESTREG_CBUFADDR0]);
       OUT_BATCH(state->Buffer[I830_DESTREG_CBUFADDR1]);
-      OUT_RELOC(state->draw_region->bo,
+      OUT_RELOC(state->color_bo,
 		I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
 
-      if (state->depth_region) {
+      if (state->depth_bo) {
          OUT_BATCH(state->Buffer[I830_DESTREG_DBUFADDR0]);
          OUT_BATCH(state->Buffer[I830_DESTREG_DBUFADDR1]);
-         OUT_RELOC(state->depth_region->bo,
+         OUT_RELOC(state->depth_bo,
 		   I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
       }
 
@@ -570,8 +569,8 @@ i830_destroy_context(struct intel_context *intel)
    GLuint i;
    struct i830_context *i830 = i830_context(&intel->ctx);
 
-   intel_region_release(&i830->state.draw_region);
-   intel_region_release(&i830->state.depth_region);
+   drm_intel_bo_unreference(i830->state.color_bo);
+   drm_intel_bo_unreference(i830->state.depth_bo);
 
    for (i = 0; i < I830_TEX_UNITS; i++) {
       if (i830->state.tex_buffer[i] != NULL) {
@@ -623,11 +622,17 @@ i830_set_draw_region(struct intel_context *intel,
    struct i830_hw_state *state = &i830->state;
    uint32_t draw_x, draw_y;
 
-   if (state->draw_region != color_regions[0]) {
-      intel_region_reference(&state->draw_region, color_regions[0]);
-   }
-   if (state->depth_region != depth_region) {
-      intel_region_reference(&state->depth_region, depth_region);
+   drm_intel_bo_unreference(state->color_bo);
+   state->color_bo = NULL;
+   if (color_regions[0]) {
+      state->color_bo = color_regions[0]->bo;
+      drm_intel_bo_unreference(color_regions[0]->bo);
+   }
+   drm_intel_bo_unreference(state->depth_bo);
+   state->depth_bo = NULL;
+   if (depth_region) {
+      state->depth_bo = depth_region->bo;
+      drm_intel_bo_unreference(depth_region->bo);
    }
 
    /*
diff --git a/src/mesa/drivers/dri/i915/i915_context.h b/src/mesa/drivers/dri/i915/i915_context.h
index f5c1596..7f99f30 100644
--- a/src/mesa/drivers/dri/i915/i915_context.h
+++ b/src/mesa/drivers/dri/i915/i915_context.h
@@ -228,16 +228,11 @@ struct i915_hw_state
    GLuint Program[I915_PROGRAM_SIZE];
    GLuint ProgramSize;
 
-   /* Region pointers for relocation: 
-    */
-   struct intel_region *draw_region;
-   struct intel_region *depth_region;
-/*    struct intel_region *tex_region[I915_TEX_UNITS]; */
-
-   /* Regions aren't actually that appropriate here as the memory may
-    * be from a PBO or FBO.  Will have to do this for draw and depth for
-    * FBO's...
+   /* BOs for relocations at state emit time.  The other state parameters are
+    * pre-calculated before the state emits, so only the BOs need to be
+    * available at that point.
     */
+   drm_intel_bo *color_bo, *depth_bo;
    drm_intel_bo *tex_buffer[I915_TEX_UNITS];
    GLuint tex_offset[I915_TEX_UNITS];
 
diff --git a/src/mesa/drivers/dri/i915/i915_vtbl.c b/src/mesa/drivers/dri/i915/i915_vtbl.c
index 91fde55..1c4ed14 100644
--- a/src/mesa/drivers/dri/i915/i915_vtbl.c
+++ b/src/mesa/drivers/dri/i915/i915_vtbl.c
@@ -319,10 +319,8 @@ i915_emit_state(struct intel_context *intel)
 
    aper_array[aper_count++] = intel->batch.bo;
    if (dirty & I915_UPLOAD_BUFFERS) {
-      if (state->draw_region)
-	 aper_array[aper_count++] = state->draw_region->bo;
-      if (state->depth_region)
-	 aper_array[aper_count++] = state->depth_region->bo;
+      aper_array[aper_count++] = state->color_bo;
+      aper_array[aper_count++] = state->depth_bo;
    }
 
    if (dirty & I915_UPLOAD_TEX_ALL) {
@@ -397,8 +395,8 @@ i915_emit_state(struct intel_context *intel)
       BEGIN_BATCH(count);
       OUT_BATCH(state->Buffer[I915_DESTREG_CBUFADDR0]);
       OUT_BATCH(state->Buffer[I915_DESTREG_CBUFADDR1]);
-      if (state->draw_region) {
-	 OUT_RELOC(state->draw_region->bo,
+      if (state->color_bo) {
+	 OUT_RELOC(state->color_bo,
 		   I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
       } else {
 	 OUT_BATCH(0);
@@ -406,8 +404,8 @@ i915_emit_state(struct intel_context *intel)
 
       OUT_BATCH(state->Buffer[I915_DESTREG_DBUFADDR0]);
       OUT_BATCH(state->Buffer[I915_DESTREG_DBUFADDR1]);
-      if (state->depth_region) {
-         OUT_RELOC(state->depth_region->bo,
+      if (state->depth_bo) {
+         OUT_RELOC(state->depth_bo,
 		   I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
       } else {
 	 OUT_BATCH(0);
@@ -510,8 +508,8 @@ i915_destroy_context(struct intel_context *intel)
    GLuint i;
    struct i915_context *i915 = i915_context(&intel->ctx);
 
-   intel_region_release(&i915->state.draw_region);
-   intel_region_release(&i915->state.depth_region);
+   drm_intel_bo_unreference(i915->state.color_bo);
+   drm_intel_bo_unreference(i915->state.depth_bo);
 
    for (i = 0; i < I915_TEX_UNITS; i++) {
       if (i915->state.tex_buffer[i] != NULL) {
@@ -587,11 +585,17 @@ i915_set_draw_region(struct intel_context *intel,
    struct i915_hw_state *state = &i915->state;
    uint32_t draw_x, draw_y, draw_offset;
 
-   if (state->draw_region != color_regions[0]) {
-      intel_region_reference(&state->draw_region, color_regions[0]);
-   }
-   if (state->depth_region != depth_region) {
-      intel_region_reference(&state->depth_region, depth_region);
+   drm_intel_bo_unreference(state->color_bo);
+   state->color_bo = NULL;
+   if (color_regions[0]) {
+      state->color_bo = color_regions[0]->bo;
+      drm_intel_bo_unreference(color_regions[0]->bo);
+   }
+   drm_intel_bo_unreference(state->depth_bo);
+   state->depth_bo = NULL;
+   if (depth_region) {
+      state->depth_bo = depth_region->bo;
+      drm_intel_bo_unreference(depth_region->bo);
    }
 
    /*
-- 
1.7.10.4



More information about the mesa-dev mailing list