[Mesa-dev] [PATCH 2/2] [RFC] nvc0: implement MP performance counters for nvc0:nvc8

Samuel Pitoiset samuel.pitoiset at gmail.com
Fri Jul 5 03:02:47 PDT 2013


---
 src/gallium/drivers/nvc0/nvc0_query.c  | 413 ++++++++++++++++++++++++++++++++-
 src/gallium/drivers/nvc0/nvc0_screen.h |  35 +++
 2 files changed, 440 insertions(+), 8 deletions(-)

diff --git a/src/gallium/drivers/nvc0/nvc0_query.c b/src/gallium/drivers/nvc0/nvc0_query.c
index 75c515a..834d27a 100644
--- a/src/gallium/drivers/nvc0/nvc0_query.c
+++ b/src/gallium/drivers/nvc0/nvc0_query.c
@@ -25,8 +25,10 @@
 #define NVC0_PUSH_EXPLICIT_SPACE_CHECKING
 
 #include "nvc0_context.h"
+#include "nvc0_compute.h"
 #include "nouveau/nv_object.xml.h"
 #include "nve4_compute.xml.h"
+#include "nvc0_compute.xml.h"
 
 #define NVC0_QUERY_STATE_READY   0
 #define NVC0_QUERY_STATE_ACTIVE  1
@@ -60,6 +62,11 @@ static void nve4_mp_pm_query_end(struct nvc0_context *, struct nvc0_query *);
 static boolean nve4_mp_pm_query_result(struct nvc0_context *,
                                        struct nvc0_query *, void *, boolean);
 
+static void nvc1_mp_pm_query_begin(struct nvc0_context *, struct nvc0_query *);
+static void nvc1_mp_pm_query_end(struct nvc0_context *, struct nvc0_query *);
+static boolean nvc1_mp_pm_query_result(struct nvc0_context *,
+                                       struct nvc0_query *, void *, boolean);
+
 static INLINE struct nvc0_query *
 nvc0_query(struct pipe_query *pipe)
 {
@@ -188,6 +195,13 @@ nvc0_query_create(struct pipe_context *pipe, unsigned type)
             space = (4 * 4 + 4 + 4) * nvc0->screen->mp_count * sizeof(uint32_t);
             break;
          }
+      } else if (nvc0->screen->base.class_3d >= NVC1_3D_CLASS &&
+                 nvc0->screen->base.device->drm_version >= 0x01000101) {
+         if (type >= NVC1_PM_QUERY(0) &&
+             type <= NVC1_PM_QUERY_LAST) {
+            space = (4 * 4 + 4 + 4) * nvc0->screen->mp_count * sizeof(uint32_t);
+            break;
+         }
       }
       debug_printf("invalid query type: %u\n", type);
       FREE(q);
@@ -312,6 +326,8 @@ nvc0_query_begin(struct pipe_context *pipe, struct pipe_query *pq)
 #endif
       if (q->type >= NVE4_PM_QUERY(0) && q->type <= NVE4_PM_QUERY_LAST) {
          nve4_mp_pm_query_begin(nvc0, q);
+      } else if (q->type >= NVC1_PM_QUERY(0) && q->type <= NVC1_PM_QUERY_LAST) {
+         nvc1_mp_pm_query_begin(nvc0, q);
       }
       break;
    }
@@ -391,6 +407,8 @@ nvc0_query_end(struct pipe_context *pipe, struct pipe_query *pq)
 #endif
       if (q->type >= NVE4_PM_QUERY(0) && q->type <= NVE4_PM_QUERY_LAST)
          nve4_mp_pm_query_end(nvc0, q);
+      else if (q->type >= NVC1_PM_QUERY(0) && q->type <= NVC1_PM_QUERY_LAST)
+         nvc1_mp_pm_query_end(nvc0, q);
       break;
    }
    if (q->is64bit)
@@ -430,6 +448,8 @@ nvc0_query_result(struct pipe_context *pipe, struct pipe_query *pq,
 #endif
    if (q->type >= NVE4_PM_QUERY(0) && q->type <= NVE4_PM_QUERY_LAST) {
       return nve4_mp_pm_query_result(nvc0, q, result, wait);
+   } else if (q->type >= NVC1_PM_QUERY(0) && q->type <= NVC1_PM_QUERY_LAST) {
+      return nvc1_mp_pm_query_result(nvc0, q, result, wait);
    }
 
    if (q->state != NVC0_QUERY_STATE_READY)
@@ -1130,6 +1150,371 @@ nve4_mp_pm_query_result(struct nvc0_context *nvc0, struct nvc0_query *q,
    return TRUE;
 }
 
+/* === PERFORMANCE MONITORING COUNTERS === */
+
+/* Code to read out MP counters: They are accessible via mmio, too, but let's
+ * just avoid mapping registers in userspace. We'd have to know which MPs are
+ * enabled/present, too, and that information is not presently exposed.
+ * We could add a kernel interface for it, but reading the counters like this
+ * has the advantage of being async (if get_result isn't called immediately).
+ */
+static const uint64_t nvc0_read_mp_pm_counters_code[] =
+{
+   /* mov b32 $r8 $tidx
+    * mov b32 $r12 $physid
+    * mov b32 $r0 $pm0
+    * mov b32 $r1 $pm1
+    * mov b32 $r2 $pm2
+    * mov b32 $r3 $pm3
+    * mov b32 $r4 $pm4
+    * mov b32 $r5 $pm5
+    * mov b32 $r6 $pm6
+    * mov b32 $r7 $pm7
+    * set $p0 0x1 eq u32 $r8 0x0
+    * mov b32 $r10 c0[0x0]
+    * ext u32 $r8 $r12 0x414
+    * mov b32 $r11 c0[0x4]
+    * ext u32 $r9 $r12 0x208
+    * (not $p0) exit
+    * set $p1 0x1 eq u32 $r9 0x0
+    * mul $r8 u32 $r8 u32 96
+    * mul $r12 u32 $r9 u32 16
+    * mul $r13 u32 $r9 u32 4
+    * add b32 $r9 $r8 $r13
+    * add b32 $r8 $r8 $r12
+    * mov b32 $r12 $r10
+    * add b32 $r10 $c $r10 $r8
+    * mov b32 $r13 $r11
+    * add b32 $r11 $r11 0x0 $c
+    * add b32 $r12 $c $r12 $r9
+    * st b128 wt g[$r10d] $r0q
+    * mov b32 $r0 c0[0x8]
+    * add b32 $r13 $r13 0x0 $c
+    * $p1 st b128 wt g[$r12d+0x40] $r4q
+    * st b32 wt g[$r12d+0x50] $r0
+    * exit */
+   0x2c00000084021c04ULL,
+   0x2c0000000c031c04ULL,
+   0x2c00000010001c04ULL,
+   0x2c00000014005c04ULL,
+   0x2c00000018009c04ULL,
+   0x2c0000001c00dc04ULL,
+   0x2c00000020011c04ULL,
+   0x2c00000024015c04ULL,
+   0x2c00000028019c04ULL,
+   0x2c0000002c01dc04ULL,
+   0x190e0000fc81dc03ULL,
+   0x2800400000029de4ULL,
+   0x7000c01050c21c03ULL,
+   0x280040001002dde4ULL,
+   0x7000c00820c25c03ULL,
+   0x80000000000021e7ULL,
+   0x190e0000fc93dc03ULL,
+   0x1000000180821c02ULL,
+   0x1000000040931c02ULL,
+   0x1000000010935c02ULL,
+   0x4800000034825c03ULL,
+   0x4800000030821c03ULL,
+   0x2800000028031de4ULL,
+   0x4801000020a29c03ULL,
+   0x280000002c035de4ULL,
+   0x0800000000b2dc42ULL,
+   0x4801000024c31c03ULL,
+   0x9400000000a01fc5ULL,
+   0x2800400020001de4ULL,
+   0x0800000000d35c42ULL,
+   0x9400000100c107c5ULL,
+   0x9400000140c01f85ULL,
+   0x8000000000001de7ULL
+};
+
+/* NOTE: intentionally using the same names as NV */
+static const char *nvc1_pm_query_names[] =
+{
+   /* MP counters */
+   "inst_executed",
+   "branch",
+   "divergent_branch",
+   "active_warps",
+   "active_cycles",
+   "warps_launched",
+   "threads_launched",
+   "shared_load",
+   "shared_store",
+   "local_load",
+   "local_store",
+   "gred_count",
+   "atom_count",
+   "gld_request",
+   "gst_request",
+   "inst_issued1_0",
+   "inst_issued1_1",
+   "inst_issued2_0",
+   "inst_issued2_1",
+   "thread_inst_executed_0",
+   "thread_inst_executed_1",
+   "thread_inst_executed_2",
+   "thread_inst_executed_3",
+   "prof_trigger_00",
+   "prof_trigger_01",
+   "prof_trigger_02",
+   "prof_trigger_03",
+   "prof_trigger_04",
+   "prof_trigger_05",
+   "prof_trigger_06",
+   "prof_trigger_07",
+};
+
+struct nvc1_mp_counter_cfg
+{
+   uint32_t func;       /* mask or 4-bit logic op (depending on mode) */
+   uint32_t mode;       /* LOGOP,B6,LOGOP_B6(_PULSE) */
+   uint32_t sig_sel;    /* signal group */
+   uint32_t src_sel[8]; /* signal selection */
+   uint8_t num_sources; /* number of sources */
+};
+
+struct nvc1_mp_pm_query_cfg
+{
+   struct nvc1_mp_counter_cfg ctr[4];
+   uint8_t num_counters;
+};
+
+#define _Q(n, f, m, g, c, s0, s1, s2, s3, s4, s5, s6, s7) [NVC1_PM_QUERY_##n] = { { { f, NVC0_COMPUTE_MP_PM_OP_MODE_##m, g, { s0, s1, s2, s3, s4, s5, s6, s7 }, c}, {}, {}, {} } , 1 }
+
+static const struct nvc1_mp_pm_query_cfg nvc1_mp_pm_queries[] =
+{
+   _Q(INST_EXECUTED,       0xaaaa, LOGOP, 0x2d, 3, 0x00, 0x11, 0x22, 0x00, 0x00, 0x00, 0x00, 0x00),
+   _Q(BRANCH,              0xaaaa, LOGOP, 0x1a, 2, 0x00, 0x11, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00),
+   _Q(BRANCH_DIVERGENT,    0xaaaa, LOGOP, 0x19, 2, 0x20, 0x31, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00),
+   _Q(ACTIVE_WARPS,        0xaaaa, LOGOP, 0x24, 6, 0x10, 0x21, 0x32, 0x43, 0x54, 0x65, 0x00, 0x00),
+   _Q(ACTIVE_CYCLES,       0xaaaa, LOGOP, 0x11, 1, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00),
+   _Q(LAUNCHED_WARPS,      0xaaaa, LOGOP, 0x26, 1, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00),
+   _Q(LAUNCHED_THREADS,    0xaaaa, LOGOP, 0x26, 6, 0x10, 0x21, 0x32, 0x43, 0x54, 0x65, 0x00, 0x00),
+   _Q(LD_SHARED,           0xaaaa, LOGOP, 0x64, 1, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00),
+   _Q(ST_SHARED,           0xaaaa, LOGOP, 0x64, 1, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00),
+   _Q(LD_LOCAL,            0xaaaa, LOGOP, 0x64, 1, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00),
+   _Q(ST_LOCAL,            0xaaaa, LOGOP, 0x64, 1, 0x50, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00),
+   _Q(COUNT_GRED,          0xaaaa, LOGOP, 0x63, 1, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00),
+   _Q(COUNT_ATOM,          0xaaaa, LOGOP, 0x63, 1, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00),
+   _Q(GLD_REQUEST,         0xaaaa, LOGOP, 0x64, 1, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00),
+   _Q(GST_REQUEST,         0xaaaa, LOGOP, 0x64, 1, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00),
+   _Q(INST_ISSUED1_0,      0xaaaa, LOGOP, 0x7e, 1, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00),
+   _Q(INST_ISSUED1_1,      0xaaaa, LOGOP, 0x7e, 1, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00),
+   _Q(INST_ISSUED2_0,      0xaaaa, LOGOP, 0x7e, 1, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00),
+   _Q(INST_ISSUED2_1,      0xaaaa, LOGOP, 0x7e, 1, 0x50, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00),
+   _Q(TH_INST_EXECUTED_0,  0xaaaa, LOGOP, 0xa3, 6, 0x00, 0x11, 0x22, 0x33, 0x44, 0x55, 0x00, 0x00),
+   _Q(TH_INST_EXECUTED_1,  0xaaaa, LOGOP, 0xa5, 6, 0x00, 0x11, 0x22, 0x33, 0x44, 0x55, 0x00, 0x00),
+   _Q(TH_INST_EXECUTED_2,  0xaaaa, LOGOP, 0xa4, 6, 0x00, 0x11, 0x22, 0x33, 0x44, 0x55, 0x00, 0x00),
+   _Q(TH_INST_EXECUTED_3,  0xaaaa, LOGOP, 0xa6, 6, 0x00, 0x11, 0x22, 0x33, 0x44, 0x55, 0x00, 0x00),
+   _Q(PROF_TRIGGER_0,      0xaaaa, LOGOP, 0x01, 1, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00),
+   _Q(PROF_TRIGGER_1,      0xaaaa, LOGOP, 0x01, 1, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00),
+   _Q(PROF_TRIGGER_2,      0xaaaa, LOGOP, 0x01, 1, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00),
+   _Q(PROF_TRIGGER_3,      0xaaaa, LOGOP, 0x01, 1, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00),
+   _Q(PROF_TRIGGER_4,      0xaaaa, LOGOP, 0x01, 1, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00),
+   _Q(PROF_TRIGGER_5,      0xaaaa, LOGOP, 0x01, 1, 0x50, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00),
+   _Q(PROF_TRIGGER_6,      0xaaaa, LOGOP, 0x01, 1, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00),
+   _Q(PROF_TRIGGER_7,      0xaaaa, LOGOP, 0x01, 1, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00),
+};
+
+#undef _Q
+
+static void
+nvc1_mp_pm_query_begin(struct nvc0_context *nvc0, struct nvc0_query *q)
+{
+   struct nvc0_screen *screen = nvc0->screen;
+   struct nouveau_pushbuf *push = nvc0->base.pushbuf;
+   const struct nvc1_mp_pm_query_cfg *cfg;
+   unsigned i, j, c;
+
+   cfg = &nvc1_mp_pm_queries[q->type - NVC1_PM_QUERY(0)];
+
+#if 0
+   /* For debugging purposes, will be removed later */
+   debug_printf("counter selected: id=%d, sig_sel=%02x, num_sources=%d, mp_count=%d\n",
+                q->type - NVC1_PM_QUERY(0), cfg->ctr[0].sig_sel, cfg->ctr[0].num_sources, screen->mp_count);
+#endif
+
+   // check if we have enough free counter slots
+   if (screen->pm.num_mp_pm_active[0] + cfg->num_counters > 4) {
+      NOUVEAU_ERR("Not enough free MP counter slots !\n");
+      return;
+   }
+
+   assert(cfg->num_counters <= 4);
+   PUSH_SPACE(push, 4 * 8 + 6);
+
+   if (!screen->pm.mp_counters_enabled) {
+      screen->pm.mp_counters_enabled = TRUE;
+      BEGIN_NVC0(push, SUBC_SW(0x06ac), 1);
+      PUSH_DATA (push, 0x1fcb);
+   }
+
+   // set sequence field to 0 (used to check if result is available)
+   for (i = 0; i < screen->mp_count; ++i)
+      q->data[i * 10 + 10] = 0;
+
+   for (i = 0; i < cfg->num_counters; ++i) {
+      if (!screen->pm.num_mp_pm_active[0]) {
+         BEGIN_NVC0(push, SUBC_SW(0x0600), 1);
+         PUSH_DATA (push, (1 << 27));
+      }
+      screen->pm.num_mp_pm_active[0]++;
+
+      for (c = 0; c < 4; ++c) {
+         if (!screen->pm.mp_counter[c]) {
+            q->ctr[i] = c;
+            screen->pm.mp_counter[c] = (struct pipe_query *)q;
+            break;
+         }
+      }
+
+      /* configure and reset the counter(s) */
+      for (j = 0; j < cfg->ctr[i].num_sources; j++) {
+         BEGIN_NVC0(push, NVC0_COMPUTE(MP_PM_SIGSEL(j)), 1);
+         PUSH_DATA (push, cfg->ctr[i].sig_sel);
+         BEGIN_NVC0(push, NVC0_COMPUTE(MP_PM_SRCSEL(j)), 1);
+         PUSH_DATA (push, cfg->ctr[i].src_sel[j]);
+         BEGIN_NVC0(push, NVC0_COMPUTE(MP_PM_OP(j)), 1);
+         PUSH_DATA (push, (cfg->ctr[i].func << 4) | cfg->ctr[i].mode);
+         BEGIN_NVC0(push, NVC0_COMPUTE(MP_PM_SET(j)), 1);
+         PUSH_DATA (push, 0);
+      }
+   }
+}
+
+static void
+nvc1_mp_pm_query_end(struct nvc0_context *nvc0, struct nvc0_query *q)
+{
+   struct nvc0_screen *screen = nvc0->screen;
+   struct pipe_context *pipe = &nvc0->base.pipe;
+   struct nouveau_pushbuf *push = nvc0->base.pushbuf;
+   uint32_t mask;
+   uint32_t input[3];
+   const uint block[3] = { 32, 4, 1 };
+   const uint grid[3] = { screen->mp_count, 1, 1 };
+   unsigned c;
+   const struct nvc1_mp_pm_query_cfg *cfg;
+
+   cfg = &nvc1_mp_pm_queries[q->type - NVC1_PM_QUERY(0)];
+
+   if (unlikely(!screen->pm.prog)) {
+      struct nvc0_program *prog = CALLOC_STRUCT(nvc0_program);
+      prog->type = PIPE_SHADER_COMPUTE;
+      prog->translated = TRUE;
+      prog->num_gprs = 14;
+      prog->code = (uint32_t *)nvc0_read_mp_pm_counters_code;
+      prog->code_size = sizeof(nvc0_read_mp_pm_counters_code);
+      prog->parm_size = 12;
+      screen->pm.prog = prog;
+   }
+
+   /* disable all counting */
+   PUSH_SPACE(push, 8);
+   for (c = 0; c < 8; ++c)
+      if (screen->pm.mp_counter[c])
+         IMMED_NVC0(push, NVC0_COMPUTE(MP_PM_OP(c)), 0);
+   /* release counters for this query */
+   for (c = 0; c < 8; ++c) {
+      if (nvc0_query(screen->pm.mp_counter[c]) == q) {
+         screen->pm.num_mp_pm_active[c / 4]--;
+         screen->pm.mp_counter[c] = NULL;
+      }
+   }
+
+   BCTX_REFN_bo(nvc0->bufctx_cp, CP_QUERY, NOUVEAU_BO_GART | NOUVEAU_BO_WR,
+                q->bo);
+
+   PUSH_SPACE(push, 1);
+   IMMED_NVC0(push, SUBC_COMPUTE(NV50_GRAPH_SERIALIZE), 0);
+
+   pipe->bind_compute_state(pipe, screen->pm.prog);
+   input[0] = (q->bo->offset + q->base);
+   input[1] = (q->bo->offset + q->base) >> 32;
+   input[2] = q->sequence;
+   pipe->launch_grid(pipe, block, grid, 0, input);
+
+   nouveau_bufctx_reset(nvc0->bufctx_cp, NVC0_BIND_CP_QUERY);
+
+   /* re-activate other counters */
+   PUSH_SPACE(push, 16);
+   mask = 0;
+   for (c = 0; c < 8; ++c) {
+      unsigned i;
+      q = nvc0_query(screen->pm.mp_counter[c]);
+      if (!q)
+         continue;
+      cfg = &nvc1_mp_pm_queries[q->type - NVC1_PM_QUERY(0)];
+      for (i = 0; i < cfg->num_counters; ++i) {
+         if (mask & (1 << q->ctr[i]))
+            break;
+         mask |= 1 << q->ctr[i];
+         BEGIN_NVC0(push, NVC0_COMPUTE(MP_PM_OP(q->ctr[i])), 1);
+         PUSH_DATA (push, (cfg->ctr[i].func << 4) | cfg->ctr[i].mode);
+      }
+   }
+}
+
+static boolean
+nvc1_mp_pm_query_result(struct nvc0_context *nvc0, struct nvc0_query *q,
+                        void *result, boolean wait)
+{
+   uint32_t count[32][4];
+   uint64_t value = 0;
+   unsigned mp_count = MIN2(nvc0->screen->mp_count_compute, 32);
+   unsigned p, c, d;
+   const struct nvc1_mp_pm_query_cfg *cfg;
+
+   cfg = &nvc1_mp_pm_queries[q->type - NVC1_PM_QUERY(0)];
+
+   for (p = 0; p < mp_count; ++p) {
+      const unsigned b = (0x60 / 4) * p;
+
+      for (c = 0; c < cfg->num_counters; ++c) {
+         count[p][c] = 0;
+         for (d = 0; d < ((q->ctr[c] & ~3) ? 1 : 4); ++d) {
+            if (q->data[b + 20 + d] != q->sequence) {
+               if (!wait)
+                  return FALSE;
+               if (nouveau_bo_wait(q->bo, NOUVEAU_BO_RD, nvc0->base.client))
+                  return FALSE;
+            }
+
+            if (q->ctr[c] & ~0x3)
+               count[p][c] = q->data[b + 16 + (q->ctr[c] & 3)];
+            else
+               count[p][c] += q->data[b + d * 4 + q->ctr[c]];
+         }
+      }
+   }
+
+#if 0
+   /* For debugging purposes, will be removed later */
+   uint64_t tmp_value = 0;
+   for (p = 0; p <= 192; p++) {
+      if (q->data[p] != 0) {
+         printf("q->data[%x]=%08x (%d)\n",
+                (p * 4) % 0x60, q->data[p], q->data[p]);
+      }
+   }
+
+   for (c = 0; c < cfg->num_counters; ++c) {
+      for (p = 0; p < mp_count; ++p) {
+         tmp_value += count[p][c];
+         printf("count[%d][%d]=%d\n", p, c, count[p][c]);
+      }
+   }
+   printf("result=%ld\n", tmp_value);
+#endif
+
+   for (c = 0; c < cfg->num_counters; ++c)
+      for (p = 0; p < mp_count; ++p)
+         value += count[p][c];
+
+   *(uint64_t *)result = value;
+   return TRUE;
+}
+
 int
 nvc0_screen_get_driver_query_info(struct pipe_screen *pscreen,
                                   unsigned id,
@@ -1140,10 +1525,14 @@ nvc0_screen_get_driver_query_info(struct pipe_screen *pscreen,
 
    count += NVC0_QUERY_DRV_STAT_COUNT;
 
-   if (screen->base.class_3d >= NVE4_3D_CLASS) {
-      if (screen->base.device->drm_version >= 0x01000101)
+   if (screen->base.device->drm_version >= 0x01000101) {
+      if (screen->base.class_3d >= NVE4_3D_CLASS) {
          count += NVE4_PM_QUERY_COUNT;
+      } else if (screen->base.class_3d >= NVC1_3D_CLASS) {
+         count += NVC1_PM_QUERY_COUNT;
+      }
    }
+
    if (!info)
       return count;
 
@@ -1157,12 +1546,20 @@ nvc0_screen_get_driver_query_info(struct pipe_screen *pscreen,
    } else
 #endif
    if (id < count) {
-      info->name = nve4_pm_query_names[id - NVC0_QUERY_DRV_STAT_COUNT];
-      info->query_type = NVE4_PM_QUERY(id - NVC0_QUERY_DRV_STAT_COUNT);
-      info->max_value = (id < NVE4_PM_QUERY_METRIC_MP_OCCUPANCY) ?
-         ~0ULL : 100;
-      info->uses_byte_units = FALSE;
-      return 1;
+      if (screen->base.class_3d >= NVE4_3D_CLASS) {
+         info->name = nve4_pm_query_names[id - NVC0_QUERY_DRV_STAT_COUNT];
+         info->query_type = NVE4_PM_QUERY(id - NVC0_QUERY_DRV_STAT_COUNT);
+         info->max_value = (id < NVE4_PM_QUERY_METRIC_MP_OCCUPANCY) ?
+            ~0ULL : 100;
+         info->uses_byte_units = FALSE;
+         return 1;
+      } else if (screen->base.class_3d >= NVC1_3D_CLASS) {
+         info->name = nvc1_pm_query_names[id - NVC0_QUERY_DRV_STAT_COUNT];
+         info->query_type = NVC1_PM_QUERY(id - NVC0_QUERY_DRV_STAT_COUNT);
+         info->max_value = ~0ULL;
+         info->uses_byte_units = FALSE;
+         return 1;
+      }
    }
    /* user asked for info about non-existing query */
    info->name = "this_is_not_the_query_you_are_looking_for";
diff --git a/src/gallium/drivers/nvc0/nvc0_screen.h b/src/gallium/drivers/nvc0/nvc0_screen.h
index c56ef70..74ce8ec 100644
--- a/src/gallium/drivers/nvc0/nvc0_screen.h
+++ b/src/gallium/drivers/nvc0/nvc0_screen.h
@@ -149,6 +149,41 @@ nvc0_screen(struct pipe_screen *screen)
 ...
 */
 
+#define NVC1_PM_QUERY_COUNT 31
+#define NVC1_PM_QUERY(i)    (PIPE_QUERY_DRIVER_SPECIFIC + 2048 + (i))
+#define NVC1_PM_QUERY_LAST   NVC1_PM_QUERY(NVC1_PM_QUERY_COUNT - 1)
+#define NVC1_PM_QUERY_INST_EXECUTED             0
+#define NVC1_PM_QUERY_BRANCH                    1
+#define NVC1_PM_QUERY_BRANCH_DIVERGENT          2
+#define NVC1_PM_QUERY_ACTIVE_WARPS              3
+#define NVC1_PM_QUERY_ACTIVE_CYCLES             4
+#define NVC1_PM_QUERY_LAUNCHED_WARPS            5
+#define NVC1_PM_QUERY_LAUNCHED_THREADS          6
+#define NVC1_PM_QUERY_LD_SHARED                 7
+#define NVC1_PM_QUERY_ST_SHARED                 8
+#define NVC1_PM_QUERY_LD_LOCAL                  9
+#define NVC1_PM_QUERY_ST_LOCAL                  10
+#define NVC1_PM_QUERY_COUNT_GRED                11
+#define NVC1_PM_QUERY_COUNT_ATOM                12
+#define NVC1_PM_QUERY_GLD_REQUEST               13
+#define NVC1_PM_QUERY_GST_REQUEST               14
+#define NVC1_PM_QUERY_INST_ISSUED1_0            15
+#define NVC1_PM_QUERY_INST_ISSUED1_1            16
+#define NVC1_PM_QUERY_INST_ISSUED2_0            17
+#define NVC1_PM_QUERY_INST_ISSUED2_1            18
+#define NVC1_PM_QUERY_TH_INST_EXECUTED_0        19
+#define NVC1_PM_QUERY_TH_INST_EXECUTED_1        20
+#define NVC1_PM_QUERY_TH_INST_EXECUTED_2        21
+#define NVC1_PM_QUERY_TH_INST_EXECUTED_3        22
+#define NVC1_PM_QUERY_PROF_TRIGGER_0            23
+#define NVC1_PM_QUERY_PROF_TRIGGER_1            24
+#define NVC1_PM_QUERY_PROF_TRIGGER_2            25
+#define NVC1_PM_QUERY_PROF_TRIGGER_3            26
+#define NVC1_PM_QUERY_PROF_TRIGGER_4            27
+#define NVC1_PM_QUERY_PROF_TRIGGER_5            28
+#define NVC1_PM_QUERY_PROF_TRIGGER_6            29
+#define NVC1_PM_QUERY_PROF_TRIGGER_7            30
+
 /* Driver statistics queries:
  */
 #ifdef NOUVEAU_ENABLE_DRIVER_STATISTICS
-- 
1.8.3.2



More information about the mesa-dev mailing list