[Mesa-dev] [PATCH v2 4/5] i965/fs: Rename vp_outputs_written to input_slots_valid.

Paul Berry stereotype441 at gmail.com
Thu Mar 21 17:40:33 PDT 2013


With the introduction of geometry shaders, fragment inputs will no
longer come exclusively from the vertex shader; sometimes they come
from the geometry shader.  So the name "vp_outputs_written" will
become a misnomer.  This patch renames vp_outputs_written to
input_slots_valid, to reflect the true meaning of the bitfield from
the fragment shader's point of view: it indicates which of the
possible input slots contain valid data that was written by the
previous shader stage.

Reviewed-by: Eric Anholt <eric at anholt.net>
---
 src/mesa/drivers/dri/i965/brw_fs.cpp | 6 +++---
 src/mesa/drivers/dri/i965/brw_wm.c   | 6 +++---
 src/mesa/drivers/dri/i965/brw_wm.h   | 2 +-
 3 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 5a5bfeb..ecce66b 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -1264,7 +1264,7 @@ fs_visitor::calculate_urb_setup()
          if (i == VARYING_SLOT_PSIZ)
             continue;
 
-	 if (c->key.vp_outputs_written & BITFIELD64_BIT(i)) {
+	 if (c->key.input_slots_valid & BITFIELD64_BIT(i)) {
 	    /* The back color slot is skipped when the front color is
 	     * also written to.  In addition, some slots can be
 	     * written in the vertex shader and not read in the
@@ -2995,7 +2995,7 @@ brw_fs_precompile(struct gl_context *ctx, struct gl_shader_program *prog)
    }
 
    if (intel->gen < 6)
-      key.vp_outputs_written |= BITFIELD64_BIT(VARYING_SLOT_POS);
+      key.input_slots_valid |= BITFIELD64_BIT(VARYING_SLOT_POS);
 
    for (int i = 0; i < VARYING_SLOT_MAX; i++) {
       if (!(fp->Base.InputsRead & BITFIELD64_BIT(i)))
@@ -3006,7 +3006,7 @@ brw_fs_precompile(struct gl_context *ctx, struct gl_shader_program *prog)
 
       if (intel->gen < 6) {
          if (_mesa_varying_slot_in_fs((gl_varying_slot) i))
-            key.vp_outputs_written |= BITFIELD64_BIT(i);
+            key.input_slots_valid |= BITFIELD64_BIT(i);
       }
    }
 
diff --git a/src/mesa/drivers/dri/i965/brw_wm.c b/src/mesa/drivers/dri/i965/brw_wm.c
index 6053f94..19a95bd 100644
--- a/src/mesa/drivers/dri/i965/brw_wm.c
+++ b/src/mesa/drivers/dri/i965/brw_wm.c
@@ -289,8 +289,8 @@ brw_wm_debug_recompile(struct brw_context *brw,
                       old_key->proj_attrib_mask, key->proj_attrib_mask);
    found |= key_debug(intel, "renderbuffer height",
                       old_key->drawable_height, key->drawable_height);
-   found |= key_debug(intel, "vertex shader outputs",
-                      old_key->vp_outputs_written, key->vp_outputs_written);
+   found |= key_debug(intel, "input slots valid",
+                      old_key->input_slots_valid, key->input_slots_valid);
 
    found |= brw_debug_recompile_sampler_key(intel, &old_key->tex, &key->tex);
 
@@ -481,7 +481,7 @@ static void brw_wm_populate_key( struct brw_context *brw,
 
    /* CACHE_NEW_VS_PROG */
    if (intel->gen < 6)
-      key->vp_outputs_written = brw->vue_map_geom_out.slots_valid;
+      key->input_slots_valid = brw->vue_map_geom_out.slots_valid;
 
    /* The unique fragment program ID */
    key->program_string_id = fp->id;
diff --git a/src/mesa/drivers/dri/i965/brw_wm.h b/src/mesa/drivers/dri/i965/brw_wm.h
index 8eb71de..f43d42c 100644
--- a/src/mesa/drivers/dri/i965/brw_wm.h
+++ b/src/mesa/drivers/dri/i965/brw_wm.h
@@ -70,7 +70,7 @@ struct brw_wm_prog_key {
    GLbitfield64 proj_attrib_mask; /**< one bit per fragment program attribute */
 
    GLushort drawable_height;
-   GLbitfield64 vp_outputs_written;
+   GLbitfield64 input_slots_valid;
    GLuint program_string_id:32;
 
    struct brw_sampler_prog_key_data tex;
-- 
1.8.2



More information about the mesa-dev mailing list