[Mesa-dev] [PATCH 1/2] radeon/winsys: pad IBs to a multiple of 8 DWs

[Marek Olšák]

For the series:

Reviewed-by: Marek Olšák <marek.olsak at amd.com>

Marek

On Fri, Sep 6, 2013 at 11:00 PM, Alex Deucher <alexdeucher at gmail.com> wrote:
> This aligns the gfx, compute, and dma IBs to 8 DW boundries.
> This aligns the the IB to the fetch size of the CP for optimal
> performance. Additionally, r6xx hardware requires at least 4
> DW alignment to avoid a hw bug.  This also aligns the DMA
> IBs to 8 DW which is required for the DMA engine.  This
> alignment is already handled in the gallium driver, but that
> patch can be removed not that it's done in the winsys.
>
> Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
> ---
>  src/gallium/winsys/radeon/drm/radeon_drm_cs.c | 30 +++++++++++++++++++++++++++
>  1 file changed, 30 insertions(+)
>
> diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_cs.c b/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
> index 8c91906..e4128bc 100644
> --- a/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
> +++ b/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
> @@ -470,6 +470,36 @@ static void radeon_drm_cs_flush(struct radeon_winsys_cs *rcs, unsigned flags, ui
>      struct radeon_drm_cs *cs = radeon_drm_cs(rcs);
>      struct radeon_cs_context *tmp;
>
> +    switch (cs->base.ring_type) {
> +    case RING_DMA:
> +           /* pad DMA ring to 8 DWs */
> +           if (cs->ws->info.chip_class <= SI) {
> +                   while (rcs->cdw & 7)
> +                           OUT_CS(&cs->base, 0xf0000000); /* NOP packet */
> +           } else {
> +                   while (rcs->cdw & 7)
> +                           OUT_CS(&cs->base, 0x00000000); /* NOP packet */
> +           }
> +           break;
> +    case RING_GFX:
> +           /* pad DMA ring to 8 DWs to meet CP fetch alignment requirements
> +            * r6xx, requires at least 4 dw alignment to avoid a hw bug.
> +            */
> +            if (flags & RADEON_FLUSH_COMPUTE) {
> +                   if (cs->ws->info.chip_class <= SI) {
> +                           while (rcs->cdw & 7)
> +                                   OUT_CS(&cs->base, 0x80000000); /* type2 nop packet */
> +                   } else {
> +                           while (rcs->cdw & 7)
> +                                   OUT_CS(&cs->base, 0xffff1000); /* type3 nop packet */
> +                   }
> +           } else {
> +                   while (rcs->cdw & 7)
> +                           OUT_CS(&cs->base, 0x80000000); /* type2 nop packet */
> +           }
> +           break;
> +    }
> +
>      if (rcs->cdw > RADEON_MAX_CMDBUF_DWORDS) {
>         fprintf(stderr, "radeon: command stream overflowed\n");
>      }
> --
> 1.8.3.1
>
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