[Mesa-dev] [PATCH] gallium: remove PIPE_SHADER_CAP_MAX_ADDRS
Roland Scheidegger
sroland at vmware.com
Wed Aug 6 15:41:02 PDT 2014
There's extensions like NV_vertex_program2 which can make use of more
than one address reg, I guess that's the reason why it was in gallium
(this extension also comes with opcodes arr,ara for instance which are
in gallium too).
But I doubt anyone plans to implement that so this should be fine.
Interestingly it looks like llvmpipe actually supports 16 of these
suckers maybe should cut that down... No version of d3d supported more
than 1 neither (even vs 3.0 has just 1 4-component reg).
I guess the predicate regs are a similar story except the mesa state
tracker never even queries for them (llvmpipe also supports 16 of them
though I've no idea if that even still works).
Roland
Am 07.08.2014 00:06, schrieb Marek Olšák:
> From: Marek Olšák <marek.olsak at amd.com>
>
> This limit is fixed in Mesa core and cannot be changed.
> It only affects ARB_vertex_program and ARB_fragment_program.
>
> The minimum value for ARB_vertex_program is 1 according to the spec.
> The maximum value for ARB_vertex_program is limited to 1 by Mesa core.
>
> The value should be zero for ARB_fragment_program, because it doesn't
> support ARL.
>
> Finally, drivers shouldn't mess with these values arbitrarily.
> ---
>
> Sidenote: Does anybody use predicates in TGSI?
>
> src/gallium/auxiliary/gallivm/lp_bld_limits.h | 2 --
> src/gallium/auxiliary/tgsi/tgsi_exec.h | 3 ---
> src/gallium/docs/source/screen.rst | 1 -
> src/gallium/drivers/freedreno/freedreno_screen.c | 2 --
> src/gallium/drivers/i915/i915_screen.c | 2 --
> src/gallium/drivers/ilo/ilo_screen.c | 2 --
> src/gallium/drivers/nouveau/nv30/nv30_screen.c | 4 ----
> src/gallium/drivers/nouveau/nv50/nv50_screen.c | 2 --
> src/gallium/drivers/nouveau/nvc0/nvc0_screen.c | 2 --
> src/gallium/drivers/r300/r300_screen.c | 3 ---
> src/gallium/drivers/r600/r600_pipe.c | 3 ---
> src/gallium/drivers/radeonsi/si_pipe.c | 3 ---
> src/gallium/drivers/svga/svga_screen.c | 3 ---
> src/gallium/include/pipe/p_defines.h | 1 -
> src/mesa/state_tracker/st_extensions.c | 3 +--
> 15 files changed, 1 insertion(+), 35 deletions(-)
>
> diff --git a/src/gallium/auxiliary/gallivm/lp_bld_limits.h b/src/gallium/auxiliary/gallivm/lp_bld_limits.h
> index eb83ea8..a96ab29 100644
> --- a/src/gallium/auxiliary/gallivm/lp_bld_limits.h
> +++ b/src/gallium/auxiliary/gallivm/lp_bld_limits.h
> @@ -103,8 +103,6 @@ gallivm_get_shader_param(enum pipe_shader_cap param)
> return PIPE_MAX_CONSTANT_BUFFERS;
> case PIPE_SHADER_CAP_MAX_TEMPS:
> return LP_MAX_TGSI_TEMPS;
> - case PIPE_SHADER_CAP_MAX_ADDRS:
> - return LP_MAX_TGSI_ADDRS;
> case PIPE_SHADER_CAP_MAX_PREDS:
> return LP_MAX_TGSI_PREDS;
> case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
> diff --git a/src/gallium/auxiliary/tgsi/tgsi_exec.h b/src/gallium/auxiliary/tgsi/tgsi_exec.h
> index c6fd3d7..4720ec6 100644
> --- a/src/gallium/auxiliary/tgsi/tgsi_exec.h
> +++ b/src/gallium/auxiliary/tgsi/tgsi_exec.h
> @@ -193,7 +193,6 @@ struct tgsi_sampler
> #define TGSI_EXEC_NUM_TEMP_R 4
>
> #define TGSI_EXEC_TEMP_ADDR (TGSI_EXEC_NUM_TEMPS + 8)
> -#define TGSI_EXEC_NUM_ADDRS 1
>
> /* predicate register */
> #define TGSI_EXEC_TEMP_P0 (TGSI_EXEC_NUM_TEMPS + 9)
> @@ -433,8 +432,6 @@ tgsi_exec_get_shader_param(enum pipe_shader_cap param)
> return PIPE_MAX_CONSTANT_BUFFERS;
> case PIPE_SHADER_CAP_MAX_TEMPS:
> return TGSI_EXEC_NUM_TEMPS;
> - case PIPE_SHADER_CAP_MAX_ADDRS:
> - return TGSI_EXEC_NUM_ADDRS;
> case PIPE_SHADER_CAP_MAX_PREDS:
> return TGSI_EXEC_NUM_PREDS;
> case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
> diff --git a/src/gallium/docs/source/screen.rst b/src/gallium/docs/source/screen.rst
> index 74cecc2..814e3ae 100644
> --- a/src/gallium/docs/source/screen.rst
> +++ b/src/gallium/docs/source/screen.rst
> @@ -269,7 +269,6 @@ file is still supported. In that case, the constbuf index is assumed
> to be 0.
>
> * ``PIPE_SHADER_CAP_MAX_TEMPS``: The maximum number of temporary registers.
> -* ``PIPE_SHADER_CAP_MAX_ADDRS``: The maximum number of address registers.
> * ``PIPE_SHADER_CAP_MAX_PREDS``: The maximum number of predicate registers.
> * ``PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED``: Whether the continue opcode is supported.
> * ``PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR``: Whether indirect addressing
> diff --git a/src/gallium/drivers/freedreno/freedreno_screen.c b/src/gallium/drivers/freedreno/freedreno_screen.c
> index 8fae5dd..5fb7352 100644
> --- a/src/gallium/drivers/freedreno/freedreno_screen.c
> +++ b/src/gallium/drivers/freedreno/freedreno_screen.c
> @@ -327,8 +327,6 @@ fd_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
> return 16;
> case PIPE_SHADER_CAP_MAX_TEMPS:
> return 64; /* Max native temporaries. */
> - case PIPE_SHADER_CAP_MAX_ADDRS:
> - return 1; /* Max native address registers */
> case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
> return ((screen->gpu_id >= 300) ? 1024 : 64) * sizeof(float[4]);
> case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
> diff --git a/src/gallium/drivers/i915/i915_screen.c b/src/gallium/drivers/i915/i915_screen.c
> index 133c773..ca3dd4a 100644
> --- a/src/gallium/drivers/i915/i915_screen.c
> +++ b/src/gallium/drivers/i915/i915_screen.c
> @@ -135,8 +135,6 @@ i915_get_shader_param(struct pipe_screen *screen, unsigned shader, enum pipe_sha
> return 1;
> case PIPE_SHADER_CAP_MAX_TEMPS:
> return 12; /* XXX: 12 -> 32 ? */
> - case PIPE_SHADER_CAP_MAX_ADDRS:
> - return 0;
> case PIPE_SHADER_CAP_MAX_PREDS:
> return 0;
> case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
> diff --git a/src/gallium/drivers/ilo/ilo_screen.c b/src/gallium/drivers/ilo/ilo_screen.c
> index fde4cc4..bd6d8dd 100644
> --- a/src/gallium/drivers/ilo/ilo_screen.c
> +++ b/src/gallium/drivers/ilo/ilo_screen.c
> @@ -122,8 +122,6 @@ ilo_get_shader_param(struct pipe_screen *screen, unsigned shader,
> return ILO_MAX_CONST_BUFFERS;
> case PIPE_SHADER_CAP_MAX_TEMPS:
> return 256;
> - case PIPE_SHADER_CAP_MAX_ADDRS:
> - return (shader == PIPE_SHADER_FRAGMENT) ? 0 : 1;
> case PIPE_SHADER_CAP_MAX_PREDS:
> return 0;
> case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
> diff --git a/src/gallium/drivers/nouveau/nv30/nv30_screen.c b/src/gallium/drivers/nouveau/nv30/nv30_screen.c
> index 4fa34e3..2860188 100644
> --- a/src/gallium/drivers/nouveau/nv30/nv30_screen.c
> +++ b/src/gallium/drivers/nouveau/nv30/nv30_screen.c
> @@ -207,8 +207,6 @@ nv30_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
> case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
> case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
> return 0;
> - case PIPE_SHADER_CAP_MAX_ADDRS:
> - return 2;
> case PIPE_SHADER_CAP_MAX_PREDS:
> case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
> case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
> @@ -241,8 +239,6 @@ nv30_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
> return 1;
> case PIPE_SHADER_CAP_MAX_TEMPS:
> return 32;
> - case PIPE_SHADER_CAP_MAX_ADDRS:
> - return (eng3d->oclass >= NV40_3D_CLASS) ? 1 : 0;
> case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
> case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
> return 16;
> diff --git a/src/gallium/drivers/nouveau/nv50/nv50_screen.c b/src/gallium/drivers/nouveau/nv50/nv50_screen.c
> index 677f688..7b1b112 100644
> --- a/src/gallium/drivers/nouveau/nv50/nv50_screen.c
> +++ b/src/gallium/drivers/nouveau/nv50/nv50_screen.c
> @@ -236,8 +236,6 @@ nv50_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
> return 65536;
> case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
> return NV50_MAX_PIPE_CONSTBUFS;
> - case PIPE_SHADER_CAP_MAX_ADDRS:
> - return 1;
> case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
> case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
> return shader != PIPE_SHADER_FRAGMENT;
> diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
> index 24aee6b..686da32 100644
> --- a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
> +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
> @@ -244,8 +244,6 @@ nvc0_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
> if (shader == PIPE_SHADER_COMPUTE && class_3d >= NVE4_3D_CLASS)
> return NVE4_MAX_PIPE_CONSTBUFS_COMPUTE;
> return NVC0_MAX_PIPE_CONSTBUFS;
> - case PIPE_SHADER_CAP_MAX_ADDRS:
> - return 1;
> case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
> case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
> return shader != PIPE_SHADER_FRAGMENT;
> diff --git a/src/gallium/drivers/r300/r300_screen.c b/src/gallium/drivers/r300/r300_screen.c
> index a2ac26a..97ab19e 100644
> --- a/src/gallium/drivers/r300/r300_screen.c
> +++ b/src/gallium/drivers/r300/r300_screen.c
> @@ -252,7 +252,6 @@ static int r300_get_shader_param(struct pipe_screen *pscreen, unsigned shader, e
> case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
> case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
> return r300screen->caps.num_tex_units;
> - case PIPE_SHADER_CAP_MAX_ADDRS:
> case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
> case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
> case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
> @@ -295,8 +294,6 @@ static int r300_get_shader_param(struct pipe_screen *pscreen, unsigned shader, e
> return 1;
> case PIPE_SHADER_CAP_MAX_TEMPS:
> return 32;
> - case PIPE_SHADER_CAP_MAX_ADDRS:
> - return 1; /* XXX guessed */
> case PIPE_SHADER_CAP_MAX_PREDS:
> return is_r500 ? 4 : 0; /* XXX guessed. */
> case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
> diff --git a/src/gallium/drivers/r600/r600_pipe.c b/src/gallium/drivers/r600/r600_pipe.c
> index a08e70e..f0a71c3 100644
> --- a/src/gallium/drivers/r600/r600_pipe.c
> +++ b/src/gallium/drivers/r600/r600_pipe.c
> @@ -417,9 +417,6 @@ static int r600_get_shader_param(struct pipe_screen* pscreen, unsigned shader, e
> return shader == PIPE_SHADER_VERTEX ? 16 : 32;
> case PIPE_SHADER_CAP_MAX_TEMPS:
> return 256; /* Max native temporaries. */
> - case PIPE_SHADER_CAP_MAX_ADDRS:
> - /* XXX Isn't this equal to TEMPS? */
> - return 1; /* Max native address registers */
> case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
> return R600_MAX_CONST_BUFFER_SIZE;
> case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
> diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c
> index 635b37d..5e99884 100644
> --- a/src/gallium/drivers/radeonsi/si_pipe.c
> +++ b/src/gallium/drivers/radeonsi/si_pipe.c
> @@ -347,9 +347,6 @@ static int si_get_shader_param(struct pipe_screen* pscreen, unsigned shader, enu
> return shader == PIPE_SHADER_VERTEX ? SI_NUM_VERTEX_BUFFERS : 32;
> case PIPE_SHADER_CAP_MAX_TEMPS:
> return 256; /* Max native temporaries. */
> - case PIPE_SHADER_CAP_MAX_ADDRS:
> - /* FIXME Isn't this equal to TEMPS? */
> - return 1; /* Max native address registers */
> case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
> return 4096 * sizeof(float[4]); /* actually only memory limits this */
> case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
> diff --git a/src/gallium/drivers/svga/svga_screen.c b/src/gallium/drivers/svga/svga_screen.c
> index 9326c77..2fcc75c 100644
> --- a/src/gallium/drivers/svga/svga_screen.c
> +++ b/src/gallium/drivers/svga/svga_screen.c
> @@ -321,7 +321,6 @@ static int svga_get_shader_param(struct pipe_screen *screen, unsigned shader, en
> if (!sws->get_cap(sws, SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_TEMPS, &result))
> return 32;
> return MIN2(result.u, SVGA3D_TEMPREG_MAX);
> - case PIPE_SHADER_CAP_MAX_ADDRS:
> case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
> /*
> * Although PS 3.0 has some addressing abilities it can only represent
> @@ -379,8 +378,6 @@ static int svga_get_shader_param(struct pipe_screen *screen, unsigned shader, en
> if (!sws->get_cap(sws, SVGA3D_DEVCAP_MAX_VERTEX_SHADER_TEMPS, &result))
> return 32;
> return MIN2(result.u, SVGA3D_TEMPREG_MAX);
> - case PIPE_SHADER_CAP_MAX_ADDRS:
> - return 1;
> case PIPE_SHADER_CAP_MAX_PREDS:
> return 1;
> case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
> diff --git a/src/gallium/include/pipe/p_defines.h b/src/gallium/include/pipe/p_defines.h
> index 2caacc4..7a10d98 100644
> --- a/src/gallium/include/pipe/p_defines.h
> +++ b/src/gallium/include/pipe/p_defines.h
> @@ -607,7 +607,6 @@ enum pipe_shader_cap
> PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE,
> PIPE_SHADER_CAP_MAX_CONST_BUFFERS,
> PIPE_SHADER_CAP_MAX_TEMPS,
> - PIPE_SHADER_CAP_MAX_ADDRS,
> PIPE_SHADER_CAP_MAX_PREDS,
> /* boolean caps */
> PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED,
> diff --git a/src/mesa/state_tracker/st_extensions.c b/src/mesa/state_tracker/st_extensions.c
> index 2d7b147..a530c85 100644
> --- a/src/mesa/state_tracker/st_extensions.c
> +++ b/src/mesa/state_tracker/st_extensions.c
> @@ -187,8 +187,7 @@ void st_init_limits(struct pipe_screen *screen,
> pc->MaxTemps = pc->MaxNativeTemps =
> screen->get_shader_param(screen, sh, PIPE_SHADER_CAP_MAX_TEMPS);
> pc->MaxAddressRegs = pc->MaxNativeAddressRegs =
> - _min(screen->get_shader_param(screen, sh, PIPE_SHADER_CAP_MAX_ADDRS),
> - MAX_PROGRAM_ADDRESS_REGS);
> + sh == PIPE_SHADER_VERTEX ? 1 : 0;
> pc->MaxParameters = pc->MaxNativeParameters =
> screen->get_shader_param(screen, sh,
> PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE) / sizeof(float[4]);
>
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