[Mesa-dev] [PATCH 4/4] radeon: Determine the bo priority (MSAA, depth, UVD are high)

Lauri Kasanen cand at gmx.com
Fri Jan 3 07:50:01 PST 2014


Signed-off-by: Lauri Kasanen <cand at gmx.com>
---
 src/gallium/drivers/radeon/r600_buffer_common.c | 8 ++++++++
 src/gallium/drivers/radeon/radeon_uvd.c         | 4 ++--
 src/gallium/winsys/radeon/drm/radeon_drm_bo.c   | 4 ++++
 src/gallium/winsys/radeon/drm/radeon_drm_bo.h   | 1 +
 src/gallium/winsys/radeon/drm/radeon_drm_cs.c   | 2 +-
 src/gallium/winsys/radeon/drm/radeon_winsys.h   | 2 ++
 6 files changed, 18 insertions(+), 3 deletions(-)

diff --git a/src/gallium/drivers/radeon/r600_buffer_common.c b/src/gallium/drivers/radeon/r600_buffer_common.c
index ac5fbcc..fb8005a 100644
--- a/src/gallium/drivers/radeon/r600_buffer_common.c
+++ b/src/gallium/drivers/radeon/r600_buffer_common.c
@@ -25,6 +25,7 @@
  */
 
 #include "r600_cs.h"
+#include "util/u_format.h"
 #include "util/u_memory.h"
 #include "util/u_upload_mgr.h"
 #include <inttypes.h>
@@ -101,6 +102,12 @@ bool r600_init_resource(struct r600_common_screen *rscreen,
 			bool use_reusable_pool, unsigned usage)
 {
 	uint32_t initial_domain, domains;
+	bool high_prio = false;
+
+	/* If it's depth or MSAA, consider it high priority */
+	if (util_format_has_depth(util_format_description(res->b.b.format)) ||
+		res->b.b.nr_samples > 1)
+		high_prio = true;
 
 	switch(usage) {
 	case PIPE_USAGE_STAGING:
@@ -131,6 +138,7 @@ bool r600_init_resource(struct r600_common_screen *rscreen,
 
 	res->buf = rscreen->ws->buffer_create(rscreen->ws, size, alignment,
                                               use_reusable_pool,
+                                              high_prio,
                                               initial_domain);
 	if (!res->buf) {
 		return false;
diff --git a/src/gallium/drivers/radeon/radeon_uvd.c b/src/gallium/drivers/radeon/radeon_uvd.c
index 95757e3..1cc1997 100644
--- a/src/gallium/drivers/radeon/radeon_uvd.c
+++ b/src/gallium/drivers/radeon/radeon_uvd.c
@@ -168,7 +168,7 @@ static bool create_buffer(struct ruvd_decoder *dec,
 			  struct ruvd_buffer *buffer,
 			  unsigned size)
 {
-	buffer->buf = dec->ws->buffer_create(dec->ws, size, 4096, false,
+	buffer->buf = dec->ws->buffer_create(dec->ws, size, 4096, false, true,
 					     RADEON_DOMAIN_GTT | RADEON_DOMAIN_VRAM);
 	if (!buffer->buf)
 		return false;
@@ -1008,7 +1008,7 @@ void ruvd_join_surfaces(struct radeon_winsys* ws, unsigned bind,
 	/* TODO: 2D tiling workaround */
 	alignment *= 2;
 
-	pb = ws->buffer_create(ws, size, alignment, bind, RADEON_DOMAIN_VRAM);
+	pb = ws->buffer_create(ws, size, alignment, bind, true, RADEON_DOMAIN_VRAM);
 	if (!pb)
 		return;
 
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
index 9aa1a0f..8a5eb6e 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
@@ -651,6 +651,8 @@ static struct pb_buffer *radeon_bomgr_create_bo(struct pb_manager *_mgr,
     else if (rdesc->initial_domains & RADEON_DOMAIN_GTT)
         rws->allocated_gtt += align(size, 4096);
 
+    bo->stats.high_prio = rdesc->high_prio;
+
     if (ws->bo_stats_file) {
         fprintf(ws->bo_stats_file, "%p created, size %u, prio %u, @%llu\n", bo, size,
                                    bo->stats.high_prio, stats_time_get(ws));
@@ -871,6 +873,7 @@ radeon_winsys_bo_create(struct radeon_winsys *rws,
                         unsigned size,
                         unsigned alignment,
                         boolean use_reusable_pool,
+                        boolean high_prio,
                         enum radeon_bo_domain domain)
 {
     struct radeon_drm_winsys *ws = radeon_drm_winsys(rws);
@@ -885,6 +888,7 @@ radeon_winsys_bo_create(struct radeon_winsys *rws,
     /* Additional criteria for the cache manager. */
     desc.base.usage = domain;
     desc.initial_domains = domain;
+    desc.high_prio = high_prio;
 
     /* Assign a buffer manager. */
     if (use_reusable_pool)
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_bo.h b/src/gallium/winsys/radeon/drm/radeon_drm_bo.h
index 651694b..e93e615 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_bo.h
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_bo.h
@@ -42,6 +42,7 @@ struct radeon_bo_desc {
     struct pb_desc base;
 
     unsigned initial_domains;
+    bool high_prio;
 };
 
 struct radeon_bo_stats {
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_cs.c b/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
index f78b6cc..e18deb0 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
@@ -652,7 +652,7 @@ radeon_cs_create_fence(struct radeon_winsys_cs *rcs)
     struct pb_buffer *fence;
 
     /* Create a fence, which is a dummy BO. */
-    fence = cs->ws->base.buffer_create(&cs->ws->base, 1, 1, TRUE,
+    fence = cs->ws->base.buffer_create(&cs->ws->base, 1, 1, TRUE, FALSE,
                                        RADEON_DOMAIN_GTT);
     /* Add the fence as a dummy relocation. */
     cs->ws->base.cs_add_reloc(rcs, cs->ws->base.buffer_get_cs_handle(fence),
diff --git a/src/gallium/winsys/radeon/drm/radeon_winsys.h b/src/gallium/winsys/radeon/drm/radeon_winsys.h
index 33e5c3e..748b861 100644
--- a/src/gallium/winsys/radeon/drm/radeon_winsys.h
+++ b/src/gallium/winsys/radeon/drm/radeon_winsys.h
@@ -250,6 +250,7 @@ struct radeon_winsys {
      * \param size      The size to allocate.
      * \param alignment An alignment of the buffer in memory.
      * \param use_reusable_pool Whether the cache buffer manager should be used.
+     * \param high_prio Whether this bo should be considered high priority
      * \param domain    A bitmask of the RADEON_DOMAIN_* flags.
      * \return          The created buffer object.
      */
@@ -257,6 +258,7 @@ struct radeon_winsys {
                                        unsigned size,
                                        unsigned alignment,
                                        boolean use_reusable_pool,
+                                       boolean high_prio,
                                        enum radeon_bo_domain domain);
 
     struct radeon_winsys_cs_handle *(*buffer_get_cs_handle)(
-- 
1.8.3.1



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