[Mesa-dev] [PATCH 4/4] radeon: Determine the bo priority (MSAA, depth, UVD are high)
Lauri Kasanen
cand at gmx.com
Tue Jan 7 10:15:06 PST 2014
v2: Moved the high priority check to r600_texture_create_object
Signed-off-by: Lauri Kasanen <cand at gmx.com>
---
src/gallium/drivers/r600/r600_state_common.c | 2 +-
src/gallium/drivers/radeon/r600_buffer_common.c | 6 ++++--
src/gallium/drivers/radeon/r600_pipe_common.h | 3 ++-
src/gallium/drivers/radeon/r600_texture.c | 9 ++++++++-
src/gallium/drivers/radeon/radeon_uvd.c | 4 ++--
src/gallium/winsys/radeon/drm/radeon_drm_bo.c | 4 ++++
src/gallium/winsys/radeon/drm/radeon_drm_bo.h | 1 +
src/gallium/winsys/radeon/drm/radeon_drm_cs.c | 2 +-
src/gallium/winsys/radeon/drm/radeon_winsys.h | 2 ++
9 files changed, 25 insertions(+), 8 deletions(-)
diff --git a/src/gallium/drivers/r600/r600_state_common.c b/src/gallium/drivers/r600/r600_state_common.c
index ba37af8..2f833ba 100644
--- a/src/gallium/drivers/r600/r600_state_common.c
+++ b/src/gallium/drivers/r600/r600_state_common.c
@@ -2106,7 +2106,7 @@ static void r600_invalidate_buffer(struct pipe_context *ctx, struct pipe_resourc
/* Create a new one in the same pipe_resource. */
r600_init_resource(&rctx->screen->b, rbuffer, rbuffer->b.b.width0, alignment,
- TRUE, rbuffer->b.b.usage);
+ TRUE, rbuffer->b.b.usage, FALSE);
/* We changed the buffer, now we need to bind it where the old one was bound. */
/* Vertex buffers. */
diff --git a/src/gallium/drivers/radeon/r600_buffer_common.c b/src/gallium/drivers/radeon/r600_buffer_common.c
index ac5fbcc..6083253 100644
--- a/src/gallium/drivers/radeon/r600_buffer_common.c
+++ b/src/gallium/drivers/radeon/r600_buffer_common.c
@@ -98,7 +98,8 @@ void *r600_buffer_map_sync_with_rings(struct r600_common_context *ctx,
bool r600_init_resource(struct r600_common_screen *rscreen,
struct r600_resource *res,
unsigned size, unsigned alignment,
- bool use_reusable_pool, unsigned usage)
+ bool use_reusable_pool, unsigned usage,
+ bool high_prio)
{
uint32_t initial_domain, domains;
@@ -131,6 +132,7 @@ bool r600_init_resource(struct r600_common_screen *rscreen,
res->buf = rscreen->ws->buffer_create(rscreen->ws, size, alignment,
use_reusable_pool,
+ high_prio,
initial_domain);
if (!res->buf) {
return false;
@@ -314,7 +316,7 @@ struct pipe_resource *r600_buffer_create(struct pipe_screen *screen,
rbuffer->b.vtbl = &r600_buffer_vtbl;
util_range_init(&rbuffer->valid_buffer_range);
- if (!r600_init_resource(rscreen, rbuffer, templ->width0, alignment, TRUE, templ->usage)) {
+ if (!r600_init_resource(rscreen, rbuffer, templ->width0, alignment, TRUE, templ->usage, FALSE)) {
FREE(rbuffer);
return NULL;
}
diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h b/src/gallium/drivers/radeon/r600_pipe_common.h
index 4c35e66..75c78e3 100644
--- a/src/gallium/drivers/radeon/r600_pipe_common.h
+++ b/src/gallium/drivers/radeon/r600_pipe_common.h
@@ -278,7 +278,8 @@ void *r600_buffer_map_sync_with_rings(struct r600_common_context *ctx,
bool r600_init_resource(struct r600_common_screen *rscreen,
struct r600_resource *res,
unsigned size, unsigned alignment,
- bool use_reusable_pool, unsigned usage);
+ bool use_reusable_pool, unsigned usage,
+ bool high_prio);
struct pipe_resource *r600_buffer_create(struct pipe_screen *screen,
const struct pipe_resource *templ,
unsigned alignment);
diff --git a/src/gallium/drivers/radeon/r600_texture.c b/src/gallium/drivers/radeon/r600_texture.c
index caf3743..26c27c9 100644
--- a/src/gallium/drivers/radeon/r600_texture.c
+++ b/src/gallium/drivers/radeon/r600_texture.c
@@ -620,7 +620,14 @@ r600_texture_create_object(struct pipe_screen *screen,
unsigned usage = rtex->surface.level[0].mode >= RADEON_SURF_MODE_1D ?
PIPE_USAGE_STATIC : base->usage;
- if (!r600_init_resource(rscreen, resource, rtex->size, base_align, FALSE, usage)) {
+ bool high_prio = false;
+
+ /* If it's depth or MSAA, consider it high priority */
+ if (rtex->is_depth || base->nr_samples > 1)
+ high_prio = true;
+
+ if (!r600_init_resource(rscreen, resource, rtex->size,
+ base_align, FALSE, usage, high_prio)) {
FREE(rtex);
return NULL;
}
diff --git a/src/gallium/drivers/radeon/radeon_uvd.c b/src/gallium/drivers/radeon/radeon_uvd.c
index 95757e3..1cc1997 100644
--- a/src/gallium/drivers/radeon/radeon_uvd.c
+++ b/src/gallium/drivers/radeon/radeon_uvd.c
@@ -168,7 +168,7 @@ static bool create_buffer(struct ruvd_decoder *dec,
struct ruvd_buffer *buffer,
unsigned size)
{
- buffer->buf = dec->ws->buffer_create(dec->ws, size, 4096, false,
+ buffer->buf = dec->ws->buffer_create(dec->ws, size, 4096, false, true,
RADEON_DOMAIN_GTT | RADEON_DOMAIN_VRAM);
if (!buffer->buf)
return false;
@@ -1008,7 +1008,7 @@ void ruvd_join_surfaces(struct radeon_winsys* ws, unsigned bind,
/* TODO: 2D tiling workaround */
alignment *= 2;
- pb = ws->buffer_create(ws, size, alignment, bind, RADEON_DOMAIN_VRAM);
+ pb = ws->buffer_create(ws, size, alignment, bind, true, RADEON_DOMAIN_VRAM);
if (!pb)
return;
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
index 606b65a..f6d5d98 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
@@ -650,6 +650,8 @@ static struct pb_buffer *radeon_bomgr_create_bo(struct pb_manager *_mgr,
else if (rdesc->initial_domains & RADEON_DOMAIN_GTT)
rws->allocated_gtt += align(size, 4096);
+ bo->stats.high_prio = rdesc->high_prio;
+
if (rws->bo_stats_file) {
fprintf(rws->bo_stats_file, "%p created, size %u, prio %u, @%llu\n", bo, size,
bo->stats.high_prio, stats_time_get(rws));
@@ -870,6 +872,7 @@ radeon_winsys_bo_create(struct radeon_winsys *rws,
unsigned size,
unsigned alignment,
boolean use_reusable_pool,
+ boolean high_prio,
enum radeon_bo_domain domain)
{
struct radeon_drm_winsys *ws = radeon_drm_winsys(rws);
@@ -884,6 +887,7 @@ radeon_winsys_bo_create(struct radeon_winsys *rws,
/* Additional criteria for the cache manager. */
desc.base.usage = domain;
desc.initial_domains = domain;
+ desc.high_prio = high_prio;
/* Assign a buffer manager. */
if (use_reusable_pool)
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_bo.h b/src/gallium/winsys/radeon/drm/radeon_drm_bo.h
index 651694b..e93e615 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_bo.h
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_bo.h
@@ -42,6 +42,7 @@ struct radeon_bo_desc {
struct pb_desc base;
unsigned initial_domains;
+ bool high_prio;
};
struct radeon_bo_stats {
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_cs.c b/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
index 5c1b756..d5b192f 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
@@ -638,7 +638,7 @@ radeon_cs_create_fence(struct radeon_winsys_cs *rcs)
struct pb_buffer *fence;
/* Create a fence, which is a dummy BO. */
- fence = cs->ws->base.buffer_create(&cs->ws->base, 1, 1, TRUE,
+ fence = cs->ws->base.buffer_create(&cs->ws->base, 1, 1, TRUE, FALSE,
RADEON_DOMAIN_GTT);
/* Add the fence as a dummy relocation. */
cs->ws->base.cs_add_reloc(rcs, cs->ws->base.buffer_get_cs_handle(fence),
diff --git a/src/gallium/winsys/radeon/drm/radeon_winsys.h b/src/gallium/winsys/radeon/drm/radeon_winsys.h
index 0e559e1..885510b 100644
--- a/src/gallium/winsys/radeon/drm/radeon_winsys.h
+++ b/src/gallium/winsys/radeon/drm/radeon_winsys.h
@@ -250,6 +250,7 @@ struct radeon_winsys {
* \param size The size to allocate.
* \param alignment An alignment of the buffer in memory.
* \param use_reusable_pool Whether the cache buffer manager should be used.
+ * \param high_prio Whether this bo should be considered high priority
* \param domain A bitmask of the RADEON_DOMAIN_* flags.
* \return The created buffer object.
*/
@@ -257,6 +258,7 @@ struct radeon_winsys {
unsigned size,
unsigned alignment,
boolean use_reusable_pool,
+ boolean high_prio,
enum radeon_bo_domain domain);
struct radeon_winsys_cs_handle *(*buffer_get_cs_handle)(
--
1.8.3.1
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