[Mesa-dev] [RFC 4/7] i965: Refactor renderbuffer target override
Topi Pohjolainen
topi.pohjolainen at intel.com
Wed Jul 30 10:04:00 PDT 2014
Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
---
src/mesa/drivers/dri/i965/brw_state.h | 1 +
src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 16 ++++++++++++++++
src/mesa/drivers/dri/i965/gen6_blorp.cpp | 17 +----------------
src/mesa/drivers/dri/i965/gen6_depth_state.c | 17 +----------------
src/mesa/drivers/dri/i965/gen6_surface_state.c | 12 +-----------
src/mesa/drivers/dri/i965/gen7_blorp.cpp | 17 +----------------
src/mesa/drivers/dri/i965/gen7_misc_state.c | 17 +----------------
src/mesa/drivers/dri/i965/gen7_wm_surface_state.c | 4 +---
src/mesa/drivers/dri/i965/gen8_depth_state.c | 17 +----------------
src/mesa/drivers/dri/i965/gen8_surface_state.c | 4 +---
10 files changed, 25 insertions(+), 97 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_state.h b/src/mesa/drivers/dri/i965/brw_state.h
index a17157a..d3aa83e 100644
--- a/src/mesa/drivers/dri/i965/brw_state.h
+++ b/src/mesa/drivers/dri/i965/brw_state.h
@@ -212,6 +212,7 @@ void *brw_state_batch(struct brw_context *brw,
/* brw_wm_surface_state.c */
void gen4_init_vtable_surface_functions(struct brw_context *brw);
uint32_t brw_get_surface_tiling_bits(uint32_t tiling);
+uint32_t brw_get_surface_type(GLenum gl_target);
uint32_t brw_get_surface_num_multisamples(unsigned num_samples);
void brw_configure_w_tiled(const struct intel_mipmap_tree *mt,
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index 4a3111a..234a202 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -90,6 +90,22 @@ brw_get_surface_tiling_bits(uint32_t tiling)
}
}
+uint32_t
+brw_get_surface_type(GLenum gl_target)
+{
+ switch (gl_target) {
+ case GL_TEXTURE_CUBE_MAP_ARRAY:
+ case GL_TEXTURE_CUBE_MAP:
+ /* The PRM claims that we should use BRW_SURFACE_CUBE for this
+ * situation, but experiments show that gl_Layer doesn't work when we do
+ * this. So we use BRW_SURFACE_2D, since for rendering purposes this is
+ * equivalent.
+ */
+ return BRW_SURFACE_2D;
+ default:
+ return translate_tex_target(gl_target);
+ }
+}
uint32_t
brw_get_surface_num_multisamples(unsigned num_samples)
diff --git a/src/mesa/drivers/dri/i965/gen6_blorp.cpp b/src/mesa/drivers/dri/i965/gen6_blorp.cpp
index e0bdd23..bbfd70f 100644
--- a/src/mesa/drivers/dri/i965/gen6_blorp.cpp
+++ b/src/mesa/drivers/dri/i965/gen6_blorp.cpp
@@ -788,28 +788,13 @@ gen6_blorp_emit_depth_stencil_config(struct brw_context *brw,
const brw_blorp_params *params)
{
uint32_t surfwidth, surfheight;
- uint32_t surftype;
unsigned int min_array_element;
GLenum gl_target = params->depth.mt->target;
+ const uint32_t surftype = brw_get_surface_type(gl_target);
const unsigned depth = brw_adjust_depth(params->depth.mt->logical_depth0,
gl_target);
unsigned int lod;
- switch (gl_target) {
- case GL_TEXTURE_CUBE_MAP_ARRAY:
- case GL_TEXTURE_CUBE_MAP:
- /* The PRM claims that we should use BRW_SURFACE_CUBE for this
- * situation, but experiments show that gl_Layer doesn't work when we do
- * this. So we use BRW_SURFACE_2D, since for rendering purposes this is
- * equivalent.
- */
- surftype = BRW_SURFACE_2D;
- break;
- default:
- surftype = translate_tex_target(gl_target);
- break;
- }
-
min_array_element = params->depth.layer;
lod = params->depth.level - params->depth.mt->first_level;
diff --git a/src/mesa/drivers/dri/i965/gen6_depth_state.c b/src/mesa/drivers/dri/i965/gen6_depth_state.c
index 7c8c87e..f1b4e3f 100644
--- a/src/mesa/drivers/dri/i965/gen6_depth_state.c
+++ b/src/mesa/drivers/dri/i965/gen6_depth_state.c
@@ -46,7 +46,6 @@ gen6_emit_depth_stencil_hiz(struct brw_context *brw,
{
struct gl_context *ctx = &brw->ctx;
struct gl_framebuffer *fb = ctx->DrawBuffer;
- uint32_t surftype;
unsigned int min_array_element;
unsigned int lod;
const struct intel_mipmap_tree *mt = depth_mt ? depth_mt : stencil_mt;
@@ -80,21 +79,7 @@ gen6_emit_depth_stencil_hiz(struct brw_context *brw,
const GLenum gl_target = brw_get_target(rb);
const unsigned depth = intel_rb_adjust_depth(brw, irb, mt, gl_target);
-
- switch (gl_target) {
- case GL_TEXTURE_CUBE_MAP_ARRAY:
- case GL_TEXTURE_CUBE_MAP:
- /* The PRM claims that we should use BRW_SURFACE_CUBE for this
- * situation, but experiments show that gl_Layer doesn't work when we do
- * this. So we use BRW_SURFACE_2D, since for rendering purposes this is
- * equivalent.
- */
- surftype = BRW_SURFACE_2D;
- break;
- default:
- surftype = translate_tex_target(gl_target);
- break;
- }
+ const uint32_t surftype = brw_get_surface_type(gl_target);
if (fb->MaxNumLayers > 0 || !irb) {
min_array_element = 0;
diff --git a/src/mesa/drivers/dri/i965/gen6_surface_state.c b/src/mesa/drivers/dri/i965/gen6_surface_state.c
index c1c4c47..26f93a9 100644
--- a/src/mesa/drivers/dri/i965/gen6_surface_state.c
+++ b/src/mesa/drivers/dri/i965/gen6_surface_state.c
@@ -60,7 +60,7 @@ gen6_update_renderbuffer_surface(struct brw_context *brw,
mesa_format rb_format = _mesa_get_render_format(ctx, intel_rb_format(irb));
const GLenum gl_target = brw_get_target(rb);
const int depth = intel_rb_adjust_depth(brw, irb, mt, gl_target);
- uint32_t surftype;
+ const uint32_t surftype = brw_get_surface_type(gl_target);
uint32_t surf_index =
brw->wm.prog_data->binding_table.render_target_start + unit;
@@ -76,16 +76,6 @@ gen6_update_renderbuffer_surface(struct brw_context *brw,
__FUNCTION__, _mesa_get_format_name(rb_format));
}
- switch (gl_target) {
- case GL_TEXTURE_CUBE_MAP_ARRAY:
- case GL_TEXTURE_CUBE_MAP:
- surftype = BRW_SURFACE_2D;
- break;
- default:
- surftype = translate_tex_target(gl_target);
- break;
- }
-
const int min_array_element = layered ? 0 : irb->mt_layer;
surf[0] = SET_FIELD(surftype, BRW_SURFACE_TYPE) |
diff --git a/src/mesa/drivers/dri/i965/gen7_blorp.cpp b/src/mesa/drivers/dri/i965/gen7_blorp.cpp
index 24320f0..9c87886 100644
--- a/src/mesa/drivers/dri/i965/gen7_blorp.cpp
+++ b/src/mesa/drivers/dri/i965/gen7_blorp.cpp
@@ -683,28 +683,13 @@ gen7_blorp_emit_depth_stencil_config(struct brw_context *brw,
{
const uint8_t mocs = GEN7_MOCS_L3;
uint32_t surfwidth, surfheight;
- uint32_t surftype;
unsigned int min_array_element;
GLenum gl_target = params->depth.mt->target;
+ const uint32_t surftype = brw_get_surface_type(gl_target);
const unsigned depth = brw_adjust_depth(params->depth.mt->logical_depth0,
gl_target);
unsigned int lod;
- switch (gl_target) {
- case GL_TEXTURE_CUBE_MAP_ARRAY:
- case GL_TEXTURE_CUBE_MAP:
- /* The PRM claims that we should use BRW_SURFACE_CUBE for this
- * situation, but experiments show that gl_Layer doesn't work when we do
- * this. So we use BRW_SURFACE_2D, since for rendering purposes this is
- * equivalent.
- */
- surftype = BRW_SURFACE_2D;
- break;
- default:
- surftype = translate_tex_target(gl_target);
- break;
- }
-
min_array_element = params->depth.layer;
if (params->depth.mt->num_samples > 1) {
/* Convert physical layer to logical layer. */
diff --git a/src/mesa/drivers/dri/i965/gen7_misc_state.c b/src/mesa/drivers/dri/i965/gen7_misc_state.c
index 68fa89c..ab3883c 100644
--- a/src/mesa/drivers/dri/i965/gen7_misc_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_misc_state.c
@@ -42,7 +42,6 @@ gen7_emit_depth_stencil_hiz(struct brw_context *brw,
struct gl_context *ctx = &brw->ctx;
const uint8_t mocs = GEN7_MOCS_L3;
struct gl_framebuffer *fb = ctx->DrawBuffer;
- uint32_t surftype;
unsigned int min_array_element;
unsigned int lod;
const struct intel_mipmap_tree *mt = depth_mt ? depth_mt : stencil_mt;
@@ -64,21 +63,7 @@ gen7_emit_depth_stencil_hiz(struct brw_context *brw,
const GLenum gl_target = brw_get_target(rb);
const unsigned depth = intel_rb_adjust_depth(brw, irb, mt, gl_target);
-
- switch (gl_target) {
- case GL_TEXTURE_CUBE_MAP_ARRAY:
- case GL_TEXTURE_CUBE_MAP:
- /* The PRM claims that we should use BRW_SURFACE_CUBE for this
- * situation, but experiments show that gl_Layer doesn't work when we do
- * this. So we use BRW_SURFACE_2D, since for rendering purposes this is
- * equivalent.
- */
- surftype = BRW_SURFACE_2D;
- break;
- default:
- surftype = translate_tex_target(gl_target);
- break;
- }
+ const uint32_t surftype = brw_get_surface_type(gl_target);
min_array_element = irb ? irb->mt_layer : 0;
diff --git a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
index 8112a8e..7de3f4d 100644
--- a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
@@ -463,7 +463,7 @@ gen7_update_renderbuffer_surface(struct brw_context *brw,
mesa_format rb_format = _mesa_get_render_format(ctx, intel_rb_format(irb));
const GLenum gl_target = brw_get_target(rb);
const int depth = intel_rb_adjust_depth(brw, irb, mt, gl_target);
- uint32_t surftype;
+ const uint32_t surftype = brw_get_surface_type(gl_target);
bool is_array = false;
const uint8_t mocs = GEN7_MOCS_L3;
@@ -491,11 +491,9 @@ gen7_update_renderbuffer_surface(struct brw_context *brw,
switch (gl_target) {
case GL_TEXTURE_CUBE_MAP_ARRAY:
case GL_TEXTURE_CUBE_MAP:
- surftype = BRW_SURFACE_2D;
is_array = true;
break;
default:
- surftype = translate_tex_target(gl_target);
is_array = _mesa_tex_target_is_array(gl_target);
break;
}
diff --git a/src/mesa/drivers/dri/i965/gen8_depth_state.c b/src/mesa/drivers/dri/i965/gen8_depth_state.c
index 61daf24..f58f353 100644
--- a/src/mesa/drivers/dri/i965/gen8_depth_state.c
+++ b/src/mesa/drivers/dri/i965/gen8_depth_state.c
@@ -153,7 +153,6 @@ gen8_emit_depth_stencil_hiz(struct brw_context *brw,
{
struct gl_context *ctx = &brw->ctx;
struct gl_framebuffer *fb = ctx->DrawBuffer;
- uint32_t surftype;
unsigned int min_array_element;
unsigned int lod;
const struct intel_mipmap_tree *mt = depth_mt ? depth_mt : stencil_mt;
@@ -167,21 +166,7 @@ gen8_emit_depth_stencil_hiz(struct brw_context *brw,
const GLenum gl_target = brw_get_target(rb);
const unsigned depth = intel_rb_adjust_depth(brw, irb, mt, gl_target);
-
- switch (gl_target) {
- case GL_TEXTURE_CUBE_MAP_ARRAY:
- case GL_TEXTURE_CUBE_MAP:
- /* The PRM claims that we should use BRW_SURFACE_CUBE for this
- * situation, but experiments show that gl_Layer doesn't work when we do
- * this. So we use BRW_SURFACE_2D, since for rendering purposes this is
- * equivalent.
- */
- surftype = BRW_SURFACE_2D;
- break;
- default:
- surftype = translate_tex_target(gl_target);
- break;
- }
+ const uint32_t surftype = brw_get_surface_type(gl_target);
min_array_element = irb ? irb->mt_layer : 0;
diff --git a/src/mesa/drivers/dri/i965/gen8_surface_state.c b/src/mesa/drivers/dri/i965/gen8_surface_state.c
index 8ce382c..387731d 100644
--- a/src/mesa/drivers/dri/i965/gen8_surface_state.c
+++ b/src/mesa/drivers/dri/i965/gen8_surface_state.c
@@ -311,13 +311,13 @@ gen8_update_renderbuffer_surface(struct brw_context *brw,
struct intel_mipmap_tree *aux_mt = NULL;
const GLenum gl_target = brw_get_target(rb);
const int depth = intel_rb_adjust_depth(brw, irb, mt, gl_target);
+ const uint32_t surf_type = brw_get_surface_type(gl_target);
uint32_t aux_mode = 0;
unsigned width = mt->logical_width0;
unsigned height = mt->logical_height0;
unsigned pitch = mt->pitch;
uint32_t tiling = mt->tiling;
uint32_t format = 0;
- uint32_t surf_type;
bool is_array = false;
const int min_array_element = (mt->format == MESA_FORMAT_S_UINT8) ?
irb->mt_layer : (irb->mt_layer / MAX2(mt->num_samples, 1));
@@ -330,11 +330,9 @@ gen8_update_renderbuffer_surface(struct brw_context *brw,
switch (gl_target) {
case GL_TEXTURE_CUBE_MAP_ARRAY:
case GL_TEXTURE_CUBE_MAP:
- surf_type = BRW_SURFACE_2D;
is_array = true;
break;
default:
- surf_type = translate_tex_target(gl_target);
is_array = _mesa_tex_target_is_array(gl_target);
break;
}
--
1.8.3.1
More information about the mesa-dev
mailing list