[Mesa-dev] [RFC 5/7] i965: Refactor array type resolving

Pohjolainen, Topi topi.pohjolainen at intel.com
Thu Jul 31 00:12:25 PDT 2014


On Wed, Jul 30, 2014 at 07:38:00PM +0200, Roland Scheidegger wrote:
> Am 30.07.2014 19:04, schrieb Topi Pohjolainen:
> > Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
> > ---
> >  src/mesa/drivers/dri/i965/brw_state.h             |  9 +++++++++
> >  src/mesa/drivers/dri/i965/gen7_wm_surface_state.c | 14 +-------------
> >  src/mesa/drivers/dri/i965/gen8_surface_state.c    | 13 +------------
> >  3 files changed, 11 insertions(+), 25 deletions(-)
> > 
> > diff --git a/src/mesa/drivers/dri/i965/brw_state.h b/src/mesa/drivers/dri/i965/brw_state.h
> > index d3aa83e..9d9aa1c 100644
> > --- a/src/mesa/drivers/dri/i965/brw_state.h
> > +++ b/src/mesa/drivers/dri/i965/brw_state.h
> > @@ -34,6 +34,7 @@
> >  #define BRW_STATE_H
> >  
> >  #include "brw_context.h"
> > +#include "main/texformat.h"
> >  
> >  #ifdef __cplusplus
> >  extern "C" {
> > @@ -159,6 +160,14 @@ brw_get_target(const struct gl_renderbuffer *rb)
> >     return rb->TexImage->TexObject->Target;
> >  }
> >  
> > +inline static bool
> > +brw_is_array(GLenum target)
> > +{
> > +   if (target == GL_TEXTURE_CUBE_MAP_ARRAY || target == GL_TEXTURE_CUBE_MAP)
> > +      return true;
> > +   return _mesa_tex_target_is_array(target);
> > +}
> Strictly speaking a separate check for GL_TEXTURE_CUBE_MAP_ARRAY isn't
> necessary since _mesa_tex_target_is_array will return true for that anyway.

Thanks for the tip! Depending on how this series is received I'll try to
drop that in i965 code one way or the other.

> 
> Roland
> 
> 
> > +
> >  /* brw_misc_state.c */
> >  void brw_upload_invariant_state(struct brw_context *brw);
> >  uint32_t
> > diff --git a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
> > index 7de3f4d..f2b6382 100644
> > --- a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
> > +++ b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
> > @@ -464,7 +464,6 @@ gen7_update_renderbuffer_surface(struct brw_context *brw,
> >     const GLenum gl_target = brw_get_target(rb);
> >     const int depth = intel_rb_adjust_depth(brw, irb, mt, gl_target);
> >     const uint32_t surftype = brw_get_surface_type(gl_target);
> > -   bool is_array = false;
> >     const uint8_t mocs = GEN7_MOCS_L3;
> >  
> >     int min_array_element = irb->mt_layer / MAX2(mt->num_samples, 1);
> > @@ -488,16 +487,6 @@ gen7_update_renderbuffer_surface(struct brw_context *brw,
> >                      __FUNCTION__, _mesa_get_format_name(rb_format));
> >     }
> >  
> > -   switch (gl_target) {
> > -   case GL_TEXTURE_CUBE_MAP_ARRAY:
> > -   case GL_TEXTURE_CUBE_MAP:
> > -      is_array = true;
> > -      break;
> > -   default:
> > -      is_array = _mesa_tex_target_is_array(gl_target);
> > -      break;
> > -   }
> > -
> >     surf[0] = surftype << BRW_SURFACE_TYPE_SHIFT |
> >               format << BRW_SURFACE_FORMAT_SHIFT |
> >               (irb->mt->non_mip_arrays ? GEN7_SURFACE_ARYSPC_LOD0
> > @@ -509,9 +498,8 @@ gen7_update_renderbuffer_surface(struct brw_context *brw,
> >     if (irb->mt->align_w == 8)
> >        surf[0] |= GEN7_SURFACE_HALIGN_8;
> >  
> > -   if (is_array) {
> > +   if (brw_is_array(gl_target))
> >        surf[0] |= GEN7_SURFACE_IS_ARRAY;
> > -   }
> >  
> >     surf[1] = mt->bo->offset64;
> >  
> > diff --git a/src/mesa/drivers/dri/i965/gen8_surface_state.c b/src/mesa/drivers/dri/i965/gen8_surface_state.c
> > index 387731d..107be01 100644
> > --- a/src/mesa/drivers/dri/i965/gen8_surface_state.c
> > +++ b/src/mesa/drivers/dri/i965/gen8_surface_state.c
> > @@ -318,7 +318,6 @@ gen8_update_renderbuffer_surface(struct brw_context *brw,
> >     unsigned pitch = mt->pitch;
> >     uint32_t tiling = mt->tiling;
> >     uint32_t format = 0;
> > -   bool is_array = false;
> >     const int min_array_element = (mt->format == MESA_FORMAT_S_UINT8) ?
> >        irb->mt_layer : (irb->mt_layer / MAX2(mt->num_samples, 1));
> >  
> > @@ -327,16 +326,6 @@ gen8_update_renderbuffer_surface(struct brw_context *brw,
> >  
> >     intel_miptree_used_for_rendering(mt);
> >  
> > -   switch (gl_target) {
> > -   case GL_TEXTURE_CUBE_MAP_ARRAY:
> > -   case GL_TEXTURE_CUBE_MAP:
> > -      is_array = true;
> > -      break;
> > -   default:
> > -      is_array = _mesa_tex_target_is_array(gl_target);
> > -      break;
> > -   }
> > -
> >     /* _NEW_BUFFERS */
> >     /* Render targets can't use IMS layout. Stencil in turn gets configured as
> >      * single sampled and indexed manually by the program.
> > @@ -364,7 +353,7 @@ gen8_update_renderbuffer_surface(struct brw_context *brw,
> >                                      &brw->wm.base.surf_offset[surf_index]);
> >  
> >     surf[0] = (surf_type << BRW_SURFACE_TYPE_SHIFT) |
> > -             (is_array ? GEN7_SURFACE_IS_ARRAY : 0) |
> > +             (brw_is_array(gl_target) ? GEN7_SURFACE_IS_ARRAY : 0) |
> >               (format << BRW_SURFACE_FORMAT_SHIFT) |
> >               vertical_alignment(mt) |
> >               horizontal_alignment(mt) |
> > 
> 


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