[Mesa-dev] [PATCH 7/7] i965: Reorder fields of brw_state_flags to plug a hole on 64-bit

[Ian Romanick]

From: Ian Romanick <ian.d.romanick at intel.com>

Signed-off-by: Ian Romanick <ian.d.romanick at intel.com>
---
 src/mesa/drivers/dri/i965/brw_context.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h
index 656cbe8..d1b5af7 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -226,12 +226,12 @@ enum brw_state_id {
 #define BRW_NEW_TEXTURE_BUFFER          (1ull << BRW_STATE_TEXTURE_BUFFER)
 
 struct brw_state_flags {
-   /** State update flags signalled by mesa internals */
-   GLuint mesa;
    /**
     * State update flags signalled as the result of brw_tracked_state updates
     */
    uint64_t brw;
+   /** State update flags signalled by mesa internals */
+   GLuint mesa;
    /**
     * State update flags that used to be signalled by brw_state_cache.c
     * searches.
-- 
1.8.1.4