[Mesa-dev] [PATCH 33/78] i965/nir/vec4: Implement float-related functions

Antía Puentes apuentes at igalia.com
Wed Jul 1 05:48:26 PDT 2015


Hi Jason,

thanks for the review.

On mar, 2015-06-30 at 14:10 -0700, Jason Ekstrand wrote:
> First off, this needs a different commit message.  "float-related
> functions" isn't particularly descriptive.  How about "various
> rounding functions" because these really are all "rounding modes".

True, I will change it.

> > diff --git a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
> > index 12fdb48..57685bb 100644
> > --- a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
> > +++ b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
> > @@ -855,6 +855,46 @@ vec4_visitor::nir_emit_alu(nir_alu_instr *instr)

...
> > +   case nir_op_fceil: {
> > +      /* Get the number of components of the source to create a
> > +       * temporary register with the appropriate glsl type.
> > +       */
> > +      int num_components = instr->src[0].src.is_ssa ?
> > +         instr->src[0].src.ssa->num_components :
> > +         instr->src[0].src.reg.reg->num_components;
> > +      assert(num_components > 0);
> > +
> > +      src_reg tmp = src_reg(this, glsl_type::float_type, num_components);
> 
> We should be able to just do 1 register because each register is already a vec4.

Right. We only need the number of components to set the swizzle.

> > +      tmp.swizzle = brw_swizzle_for_size(num_components);




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