[Mesa-dev] [PATCH 01/13] i965: Factor out logic to build a send message instruction with indirect descriptor.

[Francisco Jerez]

Matt Turner <mattst88 at gmail.com> writes:

> On Wed, Mar 11, 2015 at 2:29 PM, Francisco Jerez <currojerez at riseup.net> wrote:
>> Matt Turner <mattst88 at gmail.com> writes:
>>> commit 4c4934636cb286e7d7836afc26e9d392e2f0f155
>>> Author: Paul Berry <stereotype441 at gmail.com>
>>> Date:   Tue Sep 24 15:18:52 2013 -0700
>>>
>>>     i965/blorp: retype destination register for texture SEND instruction to UW.
>>>
>>> The resource streamer only exists on HSW+, so the UW dest is certainly
>>> needed for things after Gen5.
>>
>> Odd, I haven't seen a mention of that restriction in the hardware specs
>> (at least not on reasonably recent ones -- the Gen4 and 5 specs do
>> mention it and they actually hang if you send a message with compression
>> enabled and anything bigger than a W as destination type).  Is this a
>> purely empirical finding?  If so, doesn't it deserve a big fat warning
>> comment?  Is this only a problem for some interaction with the resource
>> streamer or has it ever been observed to fix something else?
>
> This page [0] says:
>
> """
> The subregister number, horizontal stride, destination mask and type
> fields of <dest> are always valid and are used in part to generate the
> WrEn. This is true even if <dest> is a null register (this is an
> exception for null as for most cases these fields are ignored by
> hardware). These parameters of <dest> follow the same restriction as
> that of normal destination operand – destination region cannot cross
> the 256-bit register boundary.
> """
>
> Searching for the exact phrase quoted in Paul's commit finds another
> page that says it applies to "DevSNB+,Pre-DevBDW".
>

Hm, searching for the same phrase ("destination region cannot cross the
256-bit register boundary.") gives several matches, some of the pages
are indeed tagged "DevSNB+,Pre-DevBDW", but in all of them that phrase
appears inside a SNB-only block, I don't see any indication of that
restriction applying to Gen7 and up.

> I think this is one of those cases where they technically give you all
> the information, they just don't tell you anything about what you're
> supposed to do with it. Totally bullshit, but par for the course.
>
> I guess the good news in all of this is that we now know we don't need
> to bother with this for BDW+.
>
> [0] 3D-Media-GPGPU Engine > EU Overview > ISA Introduction >
> Instruction Set Reference > EUISA Instructions > Send Message [SNB+]
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