[Mesa-dev] [PATCH 2/3] glsl: Fix incorrect hard-coded location of the gl_SecondaryFragColorEXT built-in.

[Francisco Jerez]

Ilia Mirkin <imirkin at alum.mit.edu> writes:

> On Wed, Aug 24, 2016 at 4:30 PM, Francisco Jerez <currojerez at riseup.net> wrote:
>> Ilia Mirkin <imirkin at alum.mit.edu> writes:
>>
>>> I had trouble getting these to apply, perhaps they were meant to go on
>>> top of something else. Anyways, should be fairly easy for you to test
>>> out with llvmpipe.
>>>
>> It should apply cleanly on latest master now.
>
> Indeed it does. Running these 3 patches:
>
> glsl: Calculate bitset of secondary outputs written in ir_set_program_inouts.
> st/glsl_to_tgsi: Translate fragment shader secondary outputs to TGSI outputs.
> glsl: Fix incorrect hard-coded location of the
> gl_SecondaryFragColorEXT built-in.
>

So you didn't have PATCH 1 applied to your tree?  I'd expect this change
to behave badly without it and possibly end up creating too many
outputs.  I guess I'll have to squash this change into the others...

> I get:
>
> state_tracker/st_program.c:824:st_translate_fragment_program:
> Assertion `0' failed.
> (gdb) l
> 819                 switch (loc) {
> 820                 case FRAG_RESULT_DEPTH:
> 821                 case FRAG_RESULT_STENCIL:
> 822                 case FRAG_RESULT_SAMPLE_MASK:
> 823                    /* handled above */
> 824                    assert(0);
> 825                    break;
> 826                 case FRAG_RESULT_COLOR:
> 827                    write_all = GL_TRUE; /* fallthrough */
> 828                 default:
> (gdb) i locals
> written = 8
> loc = 3
> numColors = 1
> outputsWritten = 4
> outputMapping = {7080032, 0, 1, 0, 14, 0, 7082880, 14, 4294951632, 32767,
>   4156877824, 3574963175, 4294951316, 32767, 7015088, 0, 4294951504, 32767,
>   4030068507, 32767, 3, 14, 0, 15}
> inputMapping = {0, 4294967295 <repeats 61 times>}
> inputSlotToAttr = {0, 4294967295 <repeats 61 times>}
> interpMode = {1, 0 <repeats 79 times>}
> interpLocation = {0 <repeats 24 times>, 4120177808, 32767, 0, 0, 0, 0,
>   7080656, 0, 27, 0, 0, 0, 1744, 0, 1744, 0, 4120177728, 32767, 37, 32767,
>   576, 0, 4030368463, 32767, 7074928, 0, 7078416, 0, 4294952288, 32767, 2,
>   32767, 16, 0, 7078416, 0, 0, 2090733823, 7062160, 0, 0, 0, 7078416, 3, 3,
>   2090733823, 6845752, 0, 4294952320, 2, 4294952320, 32767, 4029319846, 32767,
>   4040141664, 32767}
> attr = 15
> inputsRead = 1
> ureg = 0x4e00000000
> write_all = 1 '\001'
>
> I don't really have the time to investigate this further ATM. However
> you should be able to reproduce yourself with llvmpipe.
>
Heh, I have a hunch what's going on, I'll take a look and resend as a
proper patch -- if the general approach seems reasonable to you?

>   -ilia
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