[Mesa-dev] [PATCH 05/15] program: Remove OPCODE_KIL_NV.
Matt Turner
mattst88 at gmail.com
Mon Feb 29 23:34:39 UTC 2016
---
src/mesa/drivers/dri/i915/i915_fragprog.c | 20 --------------------
src/mesa/program/ir_to_mesa.cpp | 13 ++++++-------
src/mesa/program/prog_execute.c | 5 -----
src/mesa/program/prog_instruction.c | 1 -
src/mesa/program/prog_instruction.h | 1 -
src/mesa/program/prog_print.c | 10 ----------
src/mesa/program/program_parse.y | 7 -------
src/mesa/state_tracker/st_mesa_to_tgsi.c | 3 ---
8 files changed, 6 insertions(+), 54 deletions(-)
diff --git a/src/mesa/drivers/dri/i915/i915_fragprog.c b/src/mesa/drivers/dri/i915/i915_fragprog.c
index 59d7959..691bae3 100644
--- a/src/mesa/drivers/dri/i915/i915_fragprog.c
+++ b/src/mesa/drivers/dri/i915/i915_fragprog.c
@@ -598,26 +598,6 @@ upload_program(struct i915_fragment_program *p)
0, src0, T0_TEXKILL);
break;
- case OPCODE_KIL_NV:
- if (inst->DstReg.CondMask == COND_TR) {
- tmp = i915_get_utemp(p);
-
- /* The KIL instruction discards the fragment if any component of
- * the source is < 0. Emit an immediate operand of {-1}.xywz.
- */
- i915_emit_texld(p, get_live_regs(p, inst),
- tmp, A0_DEST_CHANNEL_ALL,
- 0, /* use a dummy dest reg */
- negate(swizzle(tmp, ONE, ONE, ONE, ONE),
- 1, 1, 1, 1),
- T0_TEXKILL);
- } else {
- p->error = 1;
- i915_program_error(p, "Unsupported KIL_NV condition code: %d",
- inst->DstReg.CondMask);
- }
- break;
-
case OPCODE_LG2:
src0 = src_vector(p, &inst->SrcReg[0], program);
diff --git a/src/mesa/program/ir_to_mesa.cpp b/src/mesa/program/ir_to_mesa.cpp
index 6051df1..c7ca3dc 100644
--- a/src/mesa/program/ir_to_mesa.cpp
+++ b/src/mesa/program/ir_to_mesa.cpp
@@ -2112,13 +2112,12 @@ ir_to_mesa_visitor::visit(ir_return *ir)
void
ir_to_mesa_visitor::visit(ir_discard *ir)
{
- if (ir->condition) {
- ir->condition->accept(this);
- this->result.negate = ~this->result.negate;
- emit(ir, OPCODE_KIL, undef_dst, this->result);
- } else {
- emit(ir, OPCODE_KIL_NV);
- }
+ if (!ir->condition)
+ ir->condition = new(mem_ctx) ir_constant(true);
+
+ ir->condition->accept(this);
+ this->result.negate = ~this->result.negate;
+ emit(ir, OPCODE_KIL, undef_dst, this->result);
}
void
diff --git a/src/mesa/program/prog_execute.c b/src/mesa/program/prog_execute.c
index 2c52d0d..33f52fb 100644
--- a/src/mesa/program/prog_execute.c
+++ b/src/mesa/program/prog_execute.c
@@ -805,11 +805,6 @@ _mesa_execute_program(struct gl_context * ctx,
case OPCODE_ENDIF:
/* nothing */
break;
- case OPCODE_KIL_NV: /* NV_f_p only (conditional) */
- if (eval_condition(machine, inst)) {
- return GL_FALSE;
- }
- break;
case OPCODE_KIL: /* ARB_f_p only */
{
GLfloat a[4];
diff --git a/src/mesa/program/prog_instruction.c b/src/mesa/program/prog_instruction.c
index 21ef353..bba6c14 100644
--- a/src/mesa/program/prog_instruction.c
+++ b/src/mesa/program/prog_instruction.c
@@ -154,7 +154,6 @@ static const struct instruction_info InstInfo[MAX_OPCODE] = {
{ OPCODE_FRC, "FRC", 1, 1 },
{ OPCODE_IF, "IF", 1, 0 },
{ OPCODE_KIL, "KIL", 1, 0 },
- { OPCODE_KIL_NV, "KIL_NV", 0, 0 },
{ OPCODE_LG2, "LG2", 1, 1 },
{ OPCODE_LIT, "LIT", 1, 1 },
{ OPCODE_LOG, "LOG", 1, 1 },
diff --git a/src/mesa/program/prog_instruction.h b/src/mesa/program/prog_instruction.h
index d839268..b7ebe06 100644
--- a/src/mesa/program/prog_instruction.h
+++ b/src/mesa/program/prog_instruction.h
@@ -166,7 +166,6 @@ enum prog_opcode {
OPCODE_FRC, /* X X 2 X X */
OPCODE_IF, /* opt */
OPCODE_KIL, /* X X */
- OPCODE_KIL_NV, /* X X */
OPCODE_LG2, /* X X 2 X X */
OPCODE_LIT, /* X X X X */
OPCODE_LOG, /* X X */
diff --git a/src/mesa/program/prog_print.c b/src/mesa/program/prog_print.c
index 2bc07cb..25684b2 100644
--- a/src/mesa/program/prog_print.c
+++ b/src/mesa/program/prog_print.c
@@ -706,16 +706,6 @@ _mesa_fprint_instruction_opt(FILE *f,
fprint_src_reg(f, &inst->SrcReg[0], mode, prog);
fprint_comment(f, inst);
break;
- case OPCODE_KIL_NV:
- fprintf(f, "%s", _mesa_opcode_string(inst->Opcode));
- fprintf(f, " ");
- fprintf(f, "%s.%s",
- _mesa_condcode_string(inst->DstReg.CondMask),
- _mesa_swizzle_string(inst->DstReg.CondSwizzle,
- GL_FALSE, GL_FALSE));
- fprint_comment(f, inst);
- break;
-
case OPCODE_ARL:
fprintf(f, "ARL ");
fprint_dst_reg(f, &inst->DstReg, mode, prog);
diff --git a/src/mesa/program/program_parse.y b/src/mesa/program/program_parse.y
index 635f5d0..40bb92b 100644
--- a/src/mesa/program/program_parse.y
+++ b/src/mesa/program/program_parse.y
@@ -471,13 +471,6 @@ KIL_instruction: KIL swizzleSrcReg
$$ = asm_instruction_ctor(OPCODE_KIL, NULL, & $2, NULL, NULL);
state->fragment.UsesKill = 1;
}
- | KIL ccTest
- {
- $$ = asm_instruction_ctor(OPCODE_KIL_NV, NULL, NULL, NULL, NULL);
- $$->Base.DstReg.CondMask = $2.CondMask;
- $$->Base.DstReg.CondSwizzle = $2.CondSwizzle;
- state->fragment.UsesKill = 1;
- }
;
TXD_instruction: TXD_OP maskedDstReg ',' swizzleSrcReg ',' swizzleSrcReg ',' swizzleSrcReg ',' texImageUnit ',' texTarget
diff --git a/src/mesa/state_tracker/st_mesa_to_tgsi.c b/src/mesa/state_tracker/st_mesa_to_tgsi.c
index 62f0aee7..dbee3d6 100644
--- a/src/mesa/state_tracker/st_mesa_to_tgsi.c
+++ b/src/mesa/state_tracker/st_mesa_to_tgsi.c
@@ -526,9 +526,6 @@ translate_opcode( unsigned op )
return TGSI_OPCODE_TRUNC;
case OPCODE_KIL:
return TGSI_OPCODE_KILL_IF;
- case OPCODE_KIL_NV:
- /* XXX we don't support condition codes in TGSI */
- return TGSI_OPCODE_KILL;
case OPCODE_LG2:
return TGSI_OPCODE_LG2;
case OPCODE_LOG:
--
2.4.10
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