[Mesa-dev] [PATCH 2/2] i965: use L3 data cache for SSBOs

Lionel Landwerlin lionel.g.landwerlin at intel.com
Wed Oct 5 09:41:25 UTC 2016


Curro: Ping? :)

On 26/09/16 20:02, Jason Ekstrand wrote:
>
> Looks good to me. Curro, do you see anything wrong with this?
>
> --Jason
>
>
> On Sep 26, 2016 7:31 AM, "Lionel Landwerlin" <llandwerlin at gmail.com 
> <mailto:llandwerlin at gmail.com>> wrote:
>
>     Anv programs the hardware to use L3 data cache if we use either
>     SSBOs or
>     images in the shaders, we can program i965 the same way.
>
>     gl_shader_program has a bit of a confusing named field with
>     'NumAtomicBuffers'. It doesn't tell how many buffers are accessed
>     by the
>     shader in an atomic way but instead the number of atomic counters
>     manipulated by the shader.
>
>     Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com
>     <mailto:lionel.g.landwerlin at intel.com>>
>     Cc: Jason Ekstrand <jason at jlekstrand.net
>     <mailto:jason at jlekstrand.net>>
>     ---
>      src/mesa/drivers/dri/i965/gen7_l3_state.c | 3 ++-
>      1 file changed, 2 insertions(+), 1 deletion(-)
>
>     diff --git a/src/mesa/drivers/dri/i965/gen7_l3_state.c
>     b/src/mesa/drivers/dri/i965/gen7_l3_state.c
>     index 92e8788..fdaea81 100644
>     --- a/src/mesa/drivers/dri/i965/gen7_l3_state.c
>     +++ b/src/mesa/drivers/dri/i965/gen7_l3_state.c
>     @@ -55,7 +55,8 @@ get_pipeline_state_l3_weights(const struct
>     brw_context *brw)
>               prog ? prog->_LinkedShaders[stage_states[i]->stage] : NULL;
>            const struct brw_stage_prog_data *prog_data =
>     stage_states[i]->prog_data;
>
>     -      needs_dc |= (prog && prog->NumAtomicBuffers) ||
>     +      needs_dc |= (prog && (prog->NumAtomicBuffers ||
>     + prog->NumShaderStorageBlocks)) ||
>               (shader && shader->NumImages) ||
>               (prog_data && prog_data->total_scratch);
>            needs_slm |= prog_data && prog_data->total_shared;
>     --
>     2.9.3
>

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