[Mesa-dev] [PATCH 1/1] radeon: Don't check DCC on pipe buffers

[Nicolai Hähnle]

What's the path via which r600_create_surface_custom is called with a 
buffer instead of a texture?

If that happens, the assignment of surface->level_info is also incorrect...

Cheers,
Nicolai

On 13.09.2016 03:23, Jan Vesely wrote:
> Fixes segfaults in EG compute since:
> commit 21de3be8e62b2b093569a99550e6356ed2f106b4
> radeonsi: fix texture format reinterpretation with DCC
>
> Signed-off-by: Jan Vesely <jan.vesely at rutgers.edu>
> ---
>  src/gallium/drivers/radeon/r600_texture.c | 7 ++++---
>  1 file changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/src/gallium/drivers/radeon/r600_texture.c b/src/gallium/drivers/radeon/r600_texture.c
> index 41fd94b..d3a498f 100644
> --- a/src/gallium/drivers/radeon/r600_texture.c
> +++ b/src/gallium/drivers/radeon/r600_texture.c
> @@ -1788,9 +1788,10 @@ struct pipe_surface *r600_create_surface_custom(struct pipe_context *pipe,
>  	surface->base.u = templ->u;
>  	surface->level_info = &rtex->surface.level[templ->u.tex.level];
>
> -	vi_dcc_disable_if_incompatible_format(rctx, texture,
> -					      templ->u.tex.level,
> -					      templ->format);
> +	if (texture->target != PIPE_BUFFER)
> +		vi_dcc_disable_if_incompatible_format(rctx, texture,
> +						      templ->u.tex.level,
> +						      templ->format);
>
>  	return &surface->base;
>  }
>