[Mesa-dev] [PATCH 5/6] i965: Use brw_get_line_width() in Gen4-5 SF_STATE code.

[Rafael Antognolli]

Makes sense to me.

Reviewed-by: Rafael Antognolli <rafael.antognolli at intel.com>

On Wed, May 10, 2017 at 11:47:29AM -0700, Kenneth Graunke wrote:
> This unifies the Gen4-5 and Gen6+ line width calculations.
> 
> I believe it also fixes a bug - we weren't rounding the line width
> to the nearest integer.  The GL 4.5 (and GL 2.1) specs "Wide Lines"
> section says:
> 
> "The actual width of non-antialiased lines is determined by rounding
>  the supplied width to the nearest integer, then clamping it to the
>  implementation-dependent maximum non-antialiased line width."
> 
> We don't need to care about _NEW_MULTISAMPLE here because multisampling
> doesn't exist on Gen4-5, so the state shouldn't change.
> ---
>  src/mesa/drivers/dri/i965/brw_sf_state.c | 6 ++----
>  1 file changed, 2 insertions(+), 4 deletions(-)
> 
> diff --git a/src/mesa/drivers/dri/i965/brw_sf_state.c b/src/mesa/drivers/dri/i965/brw_sf_state.c
> index 30a9f5d5e43..47506dc9537 100644
> --- a/src/mesa/drivers/dri/i965/brw_sf_state.c
> +++ b/src/mesa/drivers/dri/i965/brw_sf_state.c
> @@ -40,6 +40,7 @@
>  #include "brw_state.h"
>  #include "brw_defines.h"
>  #include "brw_sf.h"
> +#include "brw_util.h"
>  
>  static void upload_sf_vp(struct brw_context *brw)
>  {
> @@ -218,14 +219,11 @@ static void upload_sf_unit( struct brw_context *brw )
>     }
>  
>     /* _NEW_LINE */
> -   sf->sf6.line_width =
> -      CLAMP(ctx->Line.Width, 1.0f, ctx->Const.MaxLineWidth) * (1<<1);
> +   sf->sf6.line_width = U_FIXED(brw_get_line_width(brw), 1);
>  
>     sf->sf6.line_endcap_aa_region_width = 1;
>     if (ctx->Line.SmoothFlag)
>        sf->sf6.aa_enable = 1;
> -   else if (sf->sf6.line_width <= 0x2)
> -       sf->sf6.line_width = 0;
>  
>     sf->sf6.point_rast_rule = BRW_RASTRULE_UPPER_RIGHT;
>  
> -- 
> 2.12.2
> 
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