[Mesa-dev] [PATCH 0/5] Gallium support for TXF and TXL with level = 0

Ilia Mirkin imirkin at alum.mit.edu
Tue Mar 7 14:20:56 UTC 2017


On Tue, Mar 7, 2017 at 9:13 AM, Marek Olšák <maraeo at gmail.com> wrote:
> On Tue, Mar 7, 2017 at 1:38 PM, Ilia Mirkin <imirkin at alum.mit.edu> wrote:
>> Why can't the compiler perform this opt? At least we do that in nouveau...
>
> Our LLVM sample intrinsics don't preserve the texture target
> information. It would be possible to do that with hacks, but I'd
> rather avoid that, because it would need a new LLVM IR pass in
> radeonsi. The information about level=0 also can't be extracted from
> TGSI directly, because it can't enumerate all "defs" of a src operand.

Right, you can't "hack" this while converting the TGSI (at least not
without serious analysis). I just figured the compiler could easily do
it. This would also have the advantage of being able to pick up places
that only become 0 after optimizations.

But if not, I have no objection to these ops. (Come to think of it,
due to a series of spectacular failures in codegen along with arch
weirdness, this will also be nice to have on nv50 for textureLod(0).)

Cheers,

  -ilia


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