[Mesa-dev] [PATCH] nv50/ir: skip optimizing ADD+SHL to SHLADD when src(1) is 0

[Ilia Mirkin]

On Mon, May 1, 2017 at 12:09 PM, Samuel Pitoiset
<samuel.pitoiset at gmail.com> wrote:
> On 05/01/2017 05:59 PM, Ilia Mirkin wrote:
>>
>> I think this is off. It shouldn't matter what the code sequence is,
>> it's all representable. You need to teach replaceZero to not mess
>> things up for SHLADD's src(1).
>
>
> It's representable but stupid to do it. We should keep the ADD there and
> this also avoids a workaround in the replaceZero logic just for that.
>
> IMHO, this is the better solution.

Yes, that would be a better optimization. However at this stage, you
have a y = SHL(x, 0) + ADD(y, z). I think it makes sense to combine
them into one and let DCE take care of it.

Ideally we wouldn't get into such a situation, but the real issue is
that a perfectly representable (if dumb) instruction like SHLADD(x, 0,
y) gets messed up by replaceZero. We should fix replaceZero. We should
also try to avoid generating such stupid instructions.