[Mesa-dev] Performance regression, was [PATCH 09/10] r600: add support for hw atomic counters.

[Gert Wollny]

Hi Dave, 

since I'm currently experimenting with improving the performance of the
tesselation shaders on r600, I notes that this series has a negative
impact on performance, i.e. with the Unigine_Heaven benchmark I get a
10% lower frame rate that can be attributed to the newly added fence
that is created in r600_create_context (r600_pipe.c:192) (See the chunk
below). 

Considering that most programs don't need atomics, I wonder whether it
would make sense to only add this fence when the shaders involved are
actually using atomics, and I'm also wondering how the latter could
actually be made known at this point where the fence is created. 

Any pointers?

Many thanks, 
Gert  

Am Donnerstag, den 02.11.2017, 15:42 +1000 schrieb Dave Airlie:
> From: Dave Airlie <airlied at redhat.com>
> 

> --- a/src/gallium/drivers/r600/r600_pipe.c
> +++ b/src/gallium/drivers/r600/r600_pipe.c
> @@ -186,6 +188,9 @@ static struct pipe_context
> *r600_create_context(struct pipe_screen *screen,
> 			   rctx->b.family == CHIP_CAICOS ||
> 			   rctx->b.family == CHIP_CAYMAN ||
> 			   rctx->b.family == CHIP_ARUBA);
> +
> + rctx->append_fence = pipe_buffer_create(rctx->b.b.screen, 
> +                PIPE_BIND_CUSTOM,  PIPE_USAGE_DEFAULT, 32);
>  		break;
>  	default:
>  		R600_ERR("Unsupported chip class %d.\n", rctx-
> >b.chip_class);
>