[Mesa-dev] [PATCH 3/3] radv: configure VGT_VERTEX_REUSE at pipeline creation

[Bas Nieuwenhuizen]

Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>

for the series.

On Fri, Oct 6, 2017 at 9:53 AM, Samuel Pitoiset
<samuel.pitoiset at gmail.com> wrote:
> Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
> ---
>  src/amd/vulkan/radv_cmd_buffer.c | 18 ++++++++----------
>  src/amd/vulkan/radv_pipeline.c   |  7 +++++++
>  src/amd/vulkan/radv_private.h    |  1 +
>  3 files changed, 16 insertions(+), 10 deletions(-)
>
> diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
> index 4b41b358e9..ea8361a5b6 100644
> --- a/src/amd/vulkan/radv_cmd_buffer.c
> +++ b/src/amd/vulkan/radv_cmd_buffer.c
> @@ -939,19 +939,17 @@ radv_emit_fragment_shader(struct radv_cmd_buffer *cmd_buffer,
>         }
>  }
>
> -static void polaris_set_vgt_vertex_reuse(struct radv_cmd_buffer *cmd_buffer,
> -                                        struct radv_pipeline *pipeline)
> +static void
> +radv_emit_vgt_vertex_reuse(struct radv_cmd_buffer *cmd_buffer,
> +                          struct radv_pipeline *pipeline)
>  {
> -       uint32_t vtx_reuse_depth = 30;
> +       struct radeon_winsys_cs *cs = cmd_buffer->cs;
> +
>         if (cmd_buffer->device->physical_device->rad_info.family < CHIP_POLARIS10)
>                 return;
>
> -       if (pipeline->shaders[MESA_SHADER_TESS_EVAL]) {
> -               if (pipeline->shaders[MESA_SHADER_TESS_EVAL]->info.tes.spacing == TESS_SPACING_FRACTIONAL_ODD)
> -                       vtx_reuse_depth = 14;
> -       }
> -       radeon_set_context_reg(cmd_buffer->cs, R_028C58_VGT_VERTEX_REUSE_BLOCK_CNTL,
> -                              vtx_reuse_depth);
> +       radeon_set_context_reg(cs, R_028C58_VGT_VERTEX_REUSE_BLOCK_CNTL,
> +                              pipeline->graphics.vtx_reuse_depth);
>  }
>
>  static void
> @@ -970,7 +968,7 @@ radv_emit_graphics_pipeline(struct radv_cmd_buffer *cmd_buffer)
>         radv_emit_tess_shaders(cmd_buffer, pipeline);
>         radv_emit_geometry_shader(cmd_buffer, pipeline);
>         radv_emit_fragment_shader(cmd_buffer, pipeline);
> -       polaris_set_vgt_vertex_reuse(cmd_buffer, pipeline);
> +       radv_emit_vgt_vertex_reuse(cmd_buffer, pipeline);
>
>         cmd_buffer->scratch_size_needed =
>                                   MAX2(cmd_buffer->scratch_size_needed,
> diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
> index cc33fbc96d..31194db184 100644
> --- a/src/amd/vulkan/radv_pipeline.c
> +++ b/src/amd/vulkan/radv_pipeline.c
> @@ -2087,6 +2087,13 @@ radv_pipeline_init(struct radv_pipeline *pipeline,
>                 else
>                         pipeline->graphics.vtx_emit_num = 2;
>         }
> +
> +       pipeline->graphics.vtx_reuse_depth = 30;
> +       if (radv_pipeline_has_tess(pipeline) &&
> +           pipeline->shaders[MESA_SHADER_TESS_EVAL]->info.tes.spacing == TESS_SPACING_FRACTIONAL_ODD) {
> +               pipeline->graphics.vtx_reuse_depth = 14;
> +       }
> +
>         if (device->debug_flags & RADV_DEBUG_DUMP_SHADER_STATS) {
>                 radv_dump_pipeline_stats(device, pipeline);
>         }
> diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h
> index adeaa6d443..316e28dc74 100644
> --- a/src/amd/vulkan/radv_private.h
> +++ b/src/amd/vulkan/radv_private.h
> @@ -1096,6 +1096,7 @@ struct radv_pipeline {
>                         bool ia_switch_on_eoi;
>                         bool partial_vs_wave;
>                         uint8_t vtx_emit_num;
> +                       uint32_t vtx_reuse_depth;
>                         struct radv_prim_vertex_count prim_vertex_count;
>                         bool can_use_guardband;
>                 } graphics;
> --
> 2.14.2
>
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