[Mesa-dev] [PATCH] intel: limit urb size for SKL/KBL/CFL GT1

[Lionel Landwerlin]

The documentation puts the URB size for SKL GT1 as "128K - 192K". I
guess this means we can't tell which one it is, so we have to go for
the lower bound. This change also changes the max VS URB entries which
is lower on GT1 skus.

Fixes a CTS test :

  dEQP-GLES31.functional.geometry_shading.layered.render_with_default_layer_3d

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107505
---
 src/intel/dev/gen_device_info.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/src/intel/dev/gen_device_info.c b/src/intel/dev/gen_device_info.c
index b0ae4d18034..ed1e73efa61 100644
--- a/src/intel/dev/gen_device_info.c
+++ b/src/intel/dev/gen_device_info.c
@@ -617,7 +617,8 @@ static const struct gen_device_info gen_device_info_skl_gt1 = {
    .num_subslices = { 2, },
    .num_eu_per_subslice = 6,
    .l3_banks = 2,
-   .urb.size = 192,
+   .urb.size = 128,
+   .urb.max_entries[MESA_SHADER_VERTEX] = 928,
    .simulator_id = 12,
 };
 
@@ -689,6 +690,8 @@ static const struct gen_device_info gen_device_info_kbl_gt1 = {
    .num_subslices = { 2, },
    .num_eu_per_subslice = 6,
    .l3_banks = 2,
+   .urb.size = 128,
+   .urb.max_entries[MESA_SHADER_VERTEX] = 928,
    .simulator_id = 16,
 };
 
@@ -775,6 +778,8 @@ static const struct gen_device_info gen_device_info_cfl_gt1 = {
    .num_subslices = { 2, },
    .num_eu_per_subslice = 6,
    .l3_banks = 2,
+   .urb.size = 128,
+   .urb.max_entries[MESA_SHADER_VERTEX] = 928,
    .simulator_id = 24,
 };
 static const struct gen_device_info gen_device_info_cfl_gt2 = {
-- 
2.18.0