[Mesa-dev] [RFC PATCH 4/9] ac/shader: scan the input fragment shader masks

[Samuel Pitoiset]

Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
---
 src/amd/common/ac_nir_to_llvm.c | 9 +--------
 src/amd/common/ac_nir_to_llvm.h | 1 -
 src/amd/common/ac_shader_info.c | 5 +++++
 src/amd/common/ac_shader_info.h | 2 ++
 src/amd/vulkan/radv_pipeline.c  | 4 ++--
 5 files changed, 10 insertions(+), 11 deletions(-)

diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index ff954be97c..91323c9849 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -112,7 +112,6 @@ struct radv_shader_context {
 
 	LLVMValueRef inputs[RADEON_LLVM_MAX_INPUTS * 4];
 
-	uint64_t input_mask;
 	uint64_t output_mask;
 	uint8_t num_output_clips;
 	uint8_t num_output_culls;
@@ -5535,7 +5534,6 @@ handle_fs_input_decl(struct radv_shader_context *ctx,
 	LLVMValueRef interp;
 
 	variable->data.driver_location = idx * 4;
-	ctx->input_mask |= ((1ull << attrib_count) - 1) << variable->data.location;
 
 	if (glsl_get_base_type(glsl_without_array(variable->type)) == GLSL_TYPE_FLOAT) {
 		unsigned interp_type =
@@ -5583,15 +5581,11 @@ handle_fs_inputs(struct radv_shader_context *ctx,
 
 	unsigned index = 0;
 
-	if (ctx->shader_info->info.ps.uses_input_attachments ||
-	    ctx->shader_info->info.needs_multiview_view_index)
-		ctx->input_mask |= 1ull << VARYING_SLOT_LAYER;
-
 	for (unsigned i = 0; i < RADEON_LLVM_MAX_INPUTS; ++i) {
 		LLVMValueRef interp_param;
 		LLVMValueRef *inputs = ctx->inputs +radeon_llvm_reg_index_soa(i, 0);
 
-		if (!(ctx->input_mask & (1ull << i)))
+		if (!(ctx->shader_info->info.input_mask & (1ull << i)))
 			continue;
 
 		if (i >= VARYING_SLOT_VAR0 || i == VARYING_SLOT_PNTC ||
@@ -5611,7 +5605,6 @@ handle_fs_inputs(struct radv_shader_context *ctx,
 						  ctx->abi.frag_pos[3]);
 		}
 	}
-	ctx->shader_info->fs.input_mask = ctx->input_mask >> VARYING_SLOT_VAR0;
 
 	if (ctx->shader_info->info.needs_multiview_view_index)
 		ctx->abi.view_index = ctx->inputs[radeon_llvm_reg_index_soa(VARYING_SLOT_LAYER, 0)];
diff --git a/src/amd/common/ac_nir_to_llvm.h b/src/amd/common/ac_nir_to_llvm.h
index 42a58e7d79..a92a094657 100644
--- a/src/amd/common/ac_nir_to_llvm.h
+++ b/src/amd/common/ac_nir_to_llvm.h
@@ -175,7 +175,6 @@ struct ac_shader_variant_info {
 			uint64_t outputs_written;
 		} vs;
 		struct {
-			uint32_t input_mask;
 			uint32_t flat_shaded_mask;
 			bool can_discard;
 			bool early_fragment_test;
diff --git a/src/amd/common/ac_shader_info.c b/src/amd/common/ac_shader_info.c
index 2a99cecdd7..0918470cbe 100644
--- a/src/amd/common/ac_shader_info.c
+++ b/src/amd/common/ac_shader_info.c
@@ -259,6 +259,8 @@ gather_info_input_decl_ps(const nir_shader *nir, const nir_variable *var,
 	    idx == VARYING_SLOT_LAYER) {
 		info->ps.num_interp += attrib_count;
 	}
+
+	info->input_mask |= ((1ull << attrib_count) - 1) << idx;
 }
 
 static void
@@ -320,8 +322,11 @@ gather_info_shader_ps(const nir_shader *nir, struct ac_shader_info *info)
 		/* VARYING_SLOT_LAYER is needed for subpass attachments, but do
 		 * not count it twice if it's already declared in the shader.
 		 */
+		info->input_mask |= 1ull << VARYING_SLOT_LAYER;
 		info->ps.num_interp++;
 	}
+
+	info->ps.input_mask = info->input_mask >> VARYING_SLOT_VAR0;
 }
 
 static void
diff --git a/src/amd/common/ac_shader_info.h b/src/amd/common/ac_shader_info.h
index 12493aead7..a8e5865119 100644
--- a/src/amd/common/ac_shader_info.h
+++ b/src/amd/common/ac_shader_info.h
@@ -35,6 +35,7 @@ struct ac_shader_info {
 	bool needs_multiview_view_index;
 	bool uses_invocation_id;
 	bool uses_prim_id;
+	uint64_t input_mask;
 	struct {
 		uint8_t input_usage_mask[VERT_ATTRIB_MAX];
 		uint8_t output_usage_mask[VARYING_SLOT_VAR31 + 1];
@@ -47,6 +48,7 @@ struct ac_shader_info {
 	} tes;
 	struct {
 		unsigned num_interp;
+		uint32_t input_mask;
 		bool force_persample;
 		bool needs_sample_positions;
 		bool uses_input_attachments;
diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index 87de1021c0..6849e9fd18 100644
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -2776,10 +2776,10 @@ radv_pipeline_generate_ps_inputs(struct radeon_winsys_cs *cs,
 		ps_offset++;
 	}
 
-	for (unsigned i = 0; i < 32 && (1u << i) <= ps->info.fs.input_mask; ++i) {
+	for (unsigned i = 0; i < 32 && (1u << i) <= ps->info.info.ps.input_mask; ++i) {
 		unsigned vs_offset;
 		bool flat_shade;
-		if (!(ps->info.fs.input_mask & (1u << i)))
+		if (!(ps->info.info.ps.input_mask & (1u << i)))
 			continue;
 
 		vs_offset = outinfo->vs_output_param_offset[VARYING_SLOT_VAR0 + i];
-- 
2.16.2