[Mesa-dev] [PATCH 1/2] radv: remove dependency on addrlib gfx9_enum.h

[Samuel Pitoiset]

On 11/19/18 7:37 PM, Dave Airlie wrote:
> On Tue, 20 Nov 2018 at 04:30, Nicolai Hähnle <nhaehnle at gmail.com> wrote:
>>
>> From: Nicolai Hähnle <nicolai.haehnle at amd.com>
>>
>> ---
>>   src/amd/common/sid.h             | 3 +++
>>   src/amd/vulkan/radv_cmd_buffer.c | 6 ++----
>>   src/amd/vulkan/radv_device.c     | 9 ++++-----
>>   3 files changed, 9 insertions(+), 9 deletions(-)
>>
>> diff --git a/src/amd/common/sid.h b/src/amd/common/sid.h
>> index 35782046dd5..49683f1aa5a 100644
>> --- a/src/amd/common/sid.h
>> +++ b/src/amd/common/sid.h
>> @@ -2429,20 +2429,23 @@
>>   #define   C_008F30_ANISO_BIAS                                         0xF81FFFFF
>>   #define   S_008F30_TRUNC_COORD(x)                                     (((unsigned)(x) & 0x1) << 27)
>>   #define   G_008F30_TRUNC_COORD(x)                                     (((x) >> 27) & 0x1)
>>   #define   C_008F30_TRUNC_COORD                                        0xF7FFFFFF
>>   #define   S_008F30_DISABLE_CUBE_WRAP(x)                               (((unsigned)(x) & 0x1) << 28)
>>   #define   G_008F30_DISABLE_CUBE_WRAP(x)                               (((x) >> 28) & 0x1)
>>   #define   C_008F30_DISABLE_CUBE_WRAP                                  0xEFFFFFFF
>>   #define   S_008F30_FILTER_MODE(x)                                     (((unsigned)(x) & 0x03) << 29)
>>   #define   G_008F30_FILTER_MODE(x)                                     (((x) >> 29) & 0x03)
>>   #define   C_008F30_FILTER_MODE                                        0x9FFFFFFF
>> +#define     V_008F30_SQ_IMG_FILTER_MODE_BLEND                       0x00
>> +#define     V_008F30_SQ_IMG_FILTER_MODE_MIN                         0x01
>> +#define     V_008F30_SQ_IMG_FILTER_MODE_MAX                         0x02
>>   /* VI */
>>   #define   S_008F30_COMPAT_MODE(x)                                     (((unsigned)(x) & 0x1) << 31)
>>   #define   G_008F30_COMPAT_MODE(x)                                     (((x) >> 31) & 0x1)
>>   #define   C_008F30_COMPAT_MODE                                        0x7FFFFFFF
>>   /*    */
>>   #define R_008F34_SQ_IMG_SAMP_WORD1                                      0x008F34
>>   #define   S_008F34_MIN_LOD(x)                                         (((unsigned)(x) & 0xFFF) << 0)
>>   #define   G_008F34_MIN_LOD(x)                                         (((x) >> 0) & 0xFFF)
>>   #define   C_008F34_MIN_LOD                                            0xFFFFF000
>>   #define   S_008F34_MAX_LOD(x)                                         (((unsigned)(x) & 0xFFF) << 12)
>> diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
>> index 8e0ed284d65..6424c3a8d9e 100644
>> --- a/src/amd/vulkan/radv_cmd_buffer.c
>> +++ b/src/amd/vulkan/radv_cmd_buffer.c
>> @@ -30,22 +30,20 @@
>>   #include "radv_shader.h"
>>   #include "radv_cs.h"
>>   #include "sid.h"
>>   #include "gfx9d.h"
>>   #include "vk_format.h"
>>   #include "radv_debug.h"
>>   #include "radv_meta.h"
>>
>>   #include "ac_debug.h"
>>
>> -#include "addrlib/gfx9/chip/gfx9_enum.h"
>> -
>>   enum {
>>          RADV_PREFETCH_VBO_DESCRIPTORS   = (1 << 0),
>>          RADV_PREFETCH_VS                = (1 << 1),
>>          RADV_PREFETCH_TCS               = (1 << 2),
>>          RADV_PREFETCH_TES               = (1 << 3),
>>          RADV_PREFETCH_GS                = (1 << 4),
>>          RADV_PREFETCH_PS                = (1 << 5),
>>          RADV_PREFETCH_SHADERS           = (RADV_PREFETCH_VS  |
>>                                             RADV_PREFETCH_TCS |
>>                                             RADV_PREFETCH_TES |
>> @@ -1314,21 +1312,21 @@ radv_load_ds_clear_metadata(struct radv_cmd_buffer *cmd_buffer,
>>          }
>>          if (aspects & VK_IMAGE_ASPECT_DEPTH_BIT)
>>                  ++reg_count;
>>
>>          uint32_t reg = R_028028_DB_STENCIL_CLEAR + 4 * reg_offset;
>>
>>          if (cmd_buffer->device->physical_device->rad_info.chip_class >= VI) {
>>                  radeon_emit(cs, PKT3(PKT3_LOAD_CONTEXT_REG, 3, 0));
>>                  radeon_emit(cs, va);
>>                  radeon_emit(cs, va >> 32);
>> -               radeon_emit(cs, (reg >> 2) - CONTEXT_SPACE_START);
>> +               radeon_emit(cs, (reg >> 2) - 0xa000);
> 
> (SI_REG_CONTEXT_OFFSET >> 2) ??
> 
> At least tie it to a value we know has meaning.
> 

Agreed.

> Otherwise
> Reviewed-by: Dave Airlie <airlied at redhat.com>
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