[Mesa-dev] [PATCH] radv/gfx10: disable TC-compat HTILE for multisampled D32_SFLOAT format

[Samuel Pitoiset]

For some reasons D32_SFLOAT is also affected on GFX10, it works
fine with previous generations.

This fixes some dEQP-VK.renderpass2.depth_stencil_resolve.*.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
---
 src/amd/vulkan/radv_image.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c
index 6245873a4ed..368bd5d839d 100644
--- a/src/amd/vulkan/radv_image.c
+++ b/src/amd/vulkan/radv_image.c
@@ -83,9 +83,12 @@ radv_use_tc_compat_htile_for_image(struct radv_device *device,
 		return false;
 
 	/* FIXME: for some reason TC compat with 2/4/8 samples breaks some cts
-	 * tests - disable for now */
+	 * tests - disable for now. On GFX10 D32_SFLOAT is affected as well.
+	 */
 	if (pCreateInfo->samples >= 2 &&
-	    pCreateInfo->format == VK_FORMAT_D32_SFLOAT_S8_UINT)
+	    (pCreateInfo->format == VK_FORMAT_D32_SFLOAT_S8_UINT ||
+	     (pCreateInfo->format == VK_FORMAT_D32_SFLOAT &&
+	      device->physical_device->rad_info.chip_class == GFX10)))
 		return false;
 
 	/* GFX9 supports both 32-bit and 16-bit depth surfaces, while GFX8 only
-- 
2.22.0